Figure 9 shows how an n-bit full adder can be implemented in " />
參數(shù)資料
型號(hào): EPF10K30EQC208-3
廠商: Altera
文件頁(yè)數(shù): 12/100頁(yè)
文件大?。?/td> 0K
描述: IC FLEX 10KE FPGA 30K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 72
系列: FLEX-10KE®
LAB/CLB數(shù): 216
邏輯元件/單元數(shù): 1728
RAM 位總計(jì): 24576
輸入/輸出數(shù): 147
門數(shù): 119000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
其它名稱: 544-1266
Altera Corporation
19
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Figure 9 shows how an n-bit full adder can be implemented in n +1 LEs
with the carry chain. One portion of the LUT generates the sum of two bits
using the input signals and the carry-in signal; the sum is routed to the
output of the LE. The register can be bypassed for simple adders or used
for an accumulator function. Another portion of the LUT and the carry
chain logic generates the carry-out signal, which is routed directly to the
carry-in signal of the next-higher-order bit. The final carry-out signal is
routed to an LE, where it can be used as a general-purpose signal.
Figure 9. FLEX 10KE Carry Chain Operation (n-Bit Full Adder)
LUT
a1
b1
Carry Chain
s1
LE1
Register
a2
b2
Carry Chain
s2
LE2
Register
Carry Chain
sn
LEn
Register
an
bn
Carry Chain
Carry-Out
LEn + 1
Register
Carry-In
LUT
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