Altera Corporation
81
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Notes to tables:
(1)
All timing parameters are described in
Tables 24 through
30 in this data sheet.
(2)
These parameters are specified by characterization.
(3)
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(4)
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Tables 59 through
65 show EPF10K200E device internal and external
timing parameters.
Table 58. EPF10K130E External Bidirectional Timing Parameters
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
2.2
2.4
3.2
ns
0.0
ns
2.8
3.0
–
ns
0.0
–
ns
2.0
5.0
2.0
7.0
2.0
9.2
ns
5.6
8.1
10.8
ns
5.6
8.1
10.8
ns
0.5
4.0
0.5
6.0
–
ns
4.6
7.1
–
ns
4.6
7.1
–
ns
Table 59. EPF10K200E Device LE Timing Microparameters (Part 1 of 2)
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tLUT
0.7
0.8
1.2
ns
tCLUT
0.4
0.5
0.6
ns
tRLUT
0.6
0.7
0.9
ns
tPACKED
0.3
0.5
0.7
ns
tEN
0.4
0.5
0.6
ns
tCICO
0.2
0.3
ns
tCGEN
0.4
0.6
ns
tCGENR
0.2
0.3
ns
tCASC
0.7
0.8
1.2
ns
tC
0.5
0.6
0.8
ns
tCO
0.5
0.6
0.8
ns
tCOMB
0.4
0.6
0.8
ns
tSU
0.4
0.6
0.7
ns