參數(shù)資料
型號： EPF10K70RC240-3
廠商： Altera
文件頁數(shù)： 68/128頁
文件大?。?/td> 0K
描述： IC FLEX 10K FPGA 70K 240-RQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
產(chǎn)品變化通告： Package Change 30/Jun/2010
標準包裝： 24
系列： FLEX-10K®
LAB/CLB數(shù)： 468
邏輯元件/單元數(shù)： 3744
RAM 位總計： 18432
輸入/輸出數(shù)： 189
門數(shù)： 118000
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 240-RQFP（32x32）
其它名稱： 544-2243
44
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Generic Testing
Each FLEX 10K device is functionally tested. Complete testing of each
configurable SRAM bit and all logic functionality ensures 100% yield.
AC test measurements for FLEX 10K devices are made under conditions
equivalent to those shown in Figure 19. Multiple test patterns can be used
to configure devices during all stages of the production flow.
Figure 19. FLEX 10K AC Test Conditions
Operating
Conditions
Tables 17 through 21 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 5.0-V FLEX 10K devices.
VCC
To Test
System
C1 (includes
JIG capacitance)
Device input
rise and fall
times < 3 ns
Device
Output
250
(8.06 k
)
[481
]
464
(703
)
[521
]
Power supply transients can affect AC
measurements. Simultaneous transitions of
multiple outputs should be avoided for
accurate measurement. Threshold tests must
not be performed under AC conditions.
Large-amplitude, fast-ground-current
transients normally occur as the device
outputs discharge the load capacitances.
When these transients flow through the
parasitic inductance between the device
ground pin and the test system ground,
significant reductions in observable noise
immunity can result. Numbers without
parentheses are for 5.0-V devices or outputs.
Numbers in parentheses are for 3.3-V devices
or outputs. Numbers in brackets are for
2.5-V devices or outputs.
Table 17. FLEX 10K 5.0-V Device Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
Supply voltage
With respect to ground (2)
–2.0
7.0
V
VI
DC input voltage
–2.0
7.0
V
IOUT
DC output current, per pin
–25
25
mA
TSTG
Storage temperature
No bias
–65
150
° C
TAMB
Ambient temperature
Under bias
–65
135
° C
TJ
Junction temperature
Ceramic packages, under bias
150
° C
PQFP, TQFP, RQFP, and BGA
packages, under bias
135
° C
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