The Altera
參數(shù)資料
型號(hào)： EPF6024AQI208-3
廠商： Altera
文件頁(yè)數(shù)： 23/52頁(yè)
文件大?。?/td> 0K
描述： IC FLEX 6000 FPGA 24K 208-PQFP
標(biāo)準(zhǔn)包裝： 24
系列： FLEX 6000
LAB/CLB數(shù)： 196
邏輯元件/單元數(shù)： 1960
輸入/輸出數(shù)： 171
門數(shù)： 24000
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
Altera Corporation
3
FLEX 6000 Programmable Logic Device Family Data Sheet
General
Description
The Altera FLEX 6000 programmable logic device (PLD) family provides
a low-cost alternative to high-volume gate array designs. FLEX 6000
devices are based on the OptiFLEX architecture, which minimizes die size
while maintaining high performance and routability. The devices have
reconfigurable SRAM elements, which give designers the flexibility to
quickly change their designs during prototyping and design testing.
Designers can also change functionality during operation via in-circuit
reconfiguration.
FLEX 6000 devices are reprogrammable, and they are 100
% tested prior to
shipment. As a result, designers are not required to generate test vectors
for fault coverage purposes, allowing them to focus on simulation and
design verification. In addition, the designer does not need to manage
inventories of different gate array designs. FLEX 6000 devices are
configured on the board for the specific functionality required.
Table 3 shows FLEX 6000 performance for some common designs. All
performance values shown were obtained using Synopsys DesignWare or
LPM functions. Special design techniques are not required to implement
the applications; the designer simply infers or instantiates a function in a
Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or
schematic design file.
Note:
(1)
This performance value is measured as a pin-to-pin delay.
Table 3. FLEX 6000 Device Performance for Common Designs
Application
LEs Used
Performance
Units
-1 Speed
Grade
-2 Speed
Grade
-3 Speed
Grade
16-bit loadable counter
16
172
153
133
MHz
16-bit accumulator
16
172
153
133
MHz
24-bit accumulator
24
136
123
108
MHz
16-to-1 multiplexer (pin-to-pin) (1)
10
12.1
13.4
16.6
ns
16
× 16 multiplier with a 4-stage pipeline
592
84
67
58
MHz
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPF6024ATC100-2 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family
EPF6024ATC144-1 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 6000 196 LABs 117 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024ATC144-1N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 6000 196 LABs 117 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024ATC144-2 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 6000 196 LABs 117 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024ATC144-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 6000 196 LABs 117 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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