參數(shù)資料
型號: EPF81500AQC240-2
廠商: Altera
文件頁數(shù): 12/62頁
文件大小: 0K
描述: IC FLEX 8000A FPGA 16K 240-PQFP
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 48
系列: FLEX 8000
LAB/CLB數(shù): 162
邏輯元件/單元數(shù): 1296
輸入/輸出數(shù): 181
門數(shù): 16000
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應商設(shè)備封裝: 240-PQFP(32x32)
其它名稱: 544-2249
2
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
...and More
Features
Peripheral register for fast setup and clock-to-output delay
Fabricated on an advanced SRAM process
Available in a variety of packages with 84 to 304 pins (see Table 2)
Software design support and automatic place-and-route provided by
the Altera MAX+PLUS II development system for Windows-based
PCs, as well as Sun SPARCstation, HP 9000 Series 700/800, and IBM
RISC System/6000 workstations
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, Synplicity, and Veribest
Note:
(1)
FLEX 8000 device package types include plastic J-lead chip carrier (PLCC), thin quad flat pack (TQFP), plastic quad
flat pack (PQFP), power quad flat pack (RQFP), ball-grid array (BGA), and pin-grid array (PGA) packages.
General
Description
Altera’s Flexible Logic Element MatriX (FLEX) family combines the
benefits of both erasable programmable logic devices (EPLDs) and field-
programmable gate arrays (FPGAs). The FLEX 8000 device family is ideal
for a variety of applications because it combines the fine-grained
architecture and high register count characteristics of FPGAs with the
high speed and predictable interconnect delays of EPLDs. Logic is
implemented in LEs that include compact 4-input look-up tables (LUTs)
and programmable registers. High performance is provided by a fast,
continuous network of routing resources.
JTAG BST circuitry
Yes
No
Yes
No
Yes
Table 2. FLEX 8000 Package Options & I/O Pin Count
Device
84-
Pin
PLCC
100-
Pin
TQFP
144-
Pin
TQFP
160-
Pin
PQFP
160-
Pin
PGA
192-
Pin
PGA
208-
Pin
PQFP
225-
Pin
BGA
232-
Pin
PGA
240-
Pin
PQFP
280-
Pin
PGA
304-
Pin
RQFP
EPF8282A
68
78
EPF8282AV
78
EPF8452A
68
120
EPF8636A
68
118
136
EPF8820A
112
120
152
EPF81188A
148
184
EPF81500A
181
208
相關(guān)PDF資料
PDF描述
EPM2210GF324C3 IC MAX II CPLD 2210 LE 324-FBGA
EPM3512AFI256-10N IC MAX 3000A CPLD 512 256-FBGA
EPM7256SRC208-7N IC MAX 7000 CPLD 256 208-RQFP
EPM7512AEFC256-7 IC MAX 7000 CPLD 512 256-FBGA
EPM7512BFC256-5 IC MAX 7000 CPLD 512 256-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPF81500AQC240-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500ARC2402 制造商:ALTERA 功能描述:*