Notes to tables: (1) Perform a complete thermal analysis before " />
參數(shù)資料
型號： EPF81500AQC240-2
廠商： Altera
文件頁數(shù)： 59/62頁
文件大小： 0K
描述： IC FLEX 8000A FPGA 16K 240-PQFP
產(chǎn)品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 48
系列： FLEX 8000
LAB/CLB數(shù)： 162
邏輯元件/單元數(shù)： 1296
輸入/輸出數(shù)： 181
門數(shù)： 16000
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 240-BFQFP
供應商設備封裝： 240-PQFP（32x32）
其它名稱： 544-2249
62
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
Perform a complete thermal analysis before committing a design to this device package. See Application Note 74
(2)
This pin is a dedicated pin and is not available as a user I/O pin.
(3)
SDOUT
will drive out during configuration. After configuration, it may be used as a user I/O pin. By default, the
MAX+PLUS II software will not use SDOUT as a user I/O pin; the user can override the MAX+PLUS II software and
use SDOUT as a user I/O pin.
(4)
If the device is not configured to use the JTAG BST circuitry, this pin is available as a user I/O pin.
(5)
JTAG pins are available for EPF8636A devices only. These pins are dedicated user I/O pins.
(6)
If this pin is used as an input in user mode, ensure that it does not toggle before or during configuration.
(7)
TRST
is a dedicated input pin for JTAG use. This pin must be grounded if JTAG BST is not used.
(8)
Pin 52 is a VCC pin on EPF8452A devices only.
(9)
The user I/O pin count includes dedicated input pins and all I/O pins.
(10) Unused dedicated inputs should be tied to ground on the board.
(11) SDOUT does not exist in the EPF8636GC192 device.
(12) These pins are no connect (N.C.) pins for EPF8636A devices only. They are user I/O pins in EPF8820A devices.
(13) EPF8636A devices have 132 user I/O pins; EPF8820A devices have 148 user I/O pins.
(14) For EPF81500A devices, these pins are dedicated JTAG pins and are not available as user I/O pins. If JTAG BST is
not used, TDI, TCK, TMS, and TRST should be tied to GND.
Revision
History
The information contained in the FLEX 8000 Programmable Logic Device
Family Data Sheet version 11.1 supersedes information published in
previous versions. The FLEX 8000 Programmable Logic Device Family Data
Sheet version 11.1 contains the following change: minor textual updates.
相關PDF資料
PDF描述
EPM2210GF324C3 IC MAX II CPLD 2210 LE 324-FBGA
EPM3512AFI256-10N IC MAX 3000A CPLD 512 256-FBGA
EPM7256SRC208-7N IC MAX 7000 CPLD 256 208-RQFP
EPM7512AEFC256-7 IC MAX 7000 CPLD 512 256-FBGA
EPM7512BFC256-5 IC MAX 7000 CPLD 512 256-FBGA
相關代理商/技術參數(shù)
參數(shù)描述
EPF81500AQC240-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500ARC2402 制造商:ALTERA 功能描述:*
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*