參數(shù)資料
型號： EPM3064ATI44-10
廠商： Altera
文件頁數(shù)： 13/46頁
文件大?。?/td> 0K
描述： IC MAX 3000A CPLD 64 44-TQFP
產(chǎn)品變化通告： Bond Wire Change 4/Sept/2008
標(biāo)準(zhǔn)包裝： 480
系列： MAX® 3000A
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 10.0ns
電壓電源 - 內(nèi)部： 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目： 4
宏單元數(shù)： 64
門數(shù)： 1250
輸入/輸出數(shù)： 34
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-TQFP
供應(yīng)商設(shè)備封裝： 44-TQFP（10x10）
包裝： 托盤
產(chǎn)品目錄頁面： 603 (CN2011-ZH PDF)
其它名稱： 544-1162
20
Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
Programmable
Speed/Power
Control
MAX 3000A devices offer a power–saving mode that supports low-power
operation across user–defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50% or more
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 3000A
device for either high–speed or low–power operation. As a result,
speed-critical paths in the design can run at high speed, while the
remaining paths can operate at reduced power. Macrocells that run at low
power incur a nominal timing delay adder (tLPA) for the tLAD, tLAC, tIC,
tACL, tEN, tCPPW and tSEXP parameters.
Output
Configuration
MAX 3000A device outputs can be programmed to meet a variety of
system–level requirements.
MultiVolt I/O Interface
The MAX 3000A device architecture supports the MultiVolt I/O interface
feature, which allows MAX 3000A devices to connect to systems with
differing supply voltages. MAX 3000A devices in all packages can be set
for 2.5–V, 3.3–V, or 5.0–V I/O pin operation. These devices have one set of
VCC pins for internal operation and input buffers (VCCINT), and another
set for I/O output drivers (VCCIO).
The VCCIO pins can be connected to either a 3.3–V or 2.5–V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 2.5–V power supply, the output levels are compatible with
2.5–V systems. When the VCCIO pins are connected to a 3.3–V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0–V systems. Devices operating with VCCIO levels lower than 3.0 V
incur a nominally greater timing delay of tOD2 instead of tOD1. Inputs can
always be driven by 2.5–V, 3.3–V, or 5.0–V signals.
Table 11 summarizes the MAX 3000A MultiVolt I/O support.
Note:
(1)
When VCCIO is 3.3 V, a MAX 3000A device can drive a 2.5–V device that has 3.3–V
tolerant inputs.
Table 11. MAX 3000A MultiVolt I/O Support
VCCIO Voltage
Input Signal (V)
Output Signal (V)
2.5
3.3
5.0
2.5
3.3
5.0
2.5
vvvv
3.3
vvvvvv
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