參數(shù)資料
型號(hào): EPM7512AEFC256-7
廠商: Altera
文件頁(yè)數(shù): 19/64頁(yè)
文件大?。?/td> 0K
描述: IC MAX 7000 CPLD 512 256-FBGA
標(biāo)準(zhǔn)包裝: 90
系列: MAX® 7000A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 32
宏單元數(shù): 512
門(mén)數(shù): 10000
輸入/輸出數(shù): 212
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-FBGA(17x17)
包裝: 托盤(pán)
其它名稱: 544-2357
26
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Power
Sequencing &
Hot-Socketing
Because MAX 7000A devices can be used in a mixed-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. The VCCIO and VCCINT power planes can be powered in any
order.
Signals can be driven into MAX 7000AE devices before and during power-
up (and power-down) without damaging the device. Additionally,
MAX 7000AE devices do not drive out during power-up. Once operating
conditions are reached, MAX 7000AE devices operate as specified by the
user.
MAX 7000AE device I/O pins will not source or sink more than 300 A of
DC current during power-up. All pins can be driven up to 5.75 V during
hot-socketing, except the OE1 and GLCRn pins. The OE1 and GLCRn pins
can be driven up to 3.6 V during hot-socketing. After VCCINT and VCCIO
reach the recommended operating conditions, these two pins are 5.0-V
tolerant.
EPM7128A and EPM7256A devices do not support hot-socketing and may
drive out during power-up.
Design Security
All MAX 7000A devices contain a programmable security bit that controls
access to the data programmed into the device. When this bit is
programmed, a design implemented in the device cannot be copied or
retrieved. This feature provides a high level of design security because
programmed data within EEPROM cells is invisible. The security bit that
controls this function, as well as all other programmed data, is reset only
when the device is reprogrammed.
Generic Testing
MAX 7000A devices are fully tested. Complete testing of each
programmable EEPROM bit and all internal logic elements ensures 100%
programming yield. AC test measurements are taken under conditions
equivalent to those shown in Figure 9. Test patterns can be used and then
erased during early stages of the production flow.
相關(guān)PDF資料
PDF描述
EPM7512BFC256-5 IC MAX 7000 CPLD 512 256-FBGA
EPM9560RI240-20 IC MAX 9000 CPLD 560 240-RQFP
ET80960JT10016 IC MPU I960JT 3V 100MHZ 132-QFP
EX256-PTQG100I IC FPGA ANTIFUSE 12K 100-TQFP
EXPANDIO-USB-FS-DIL-28 IC I/O EXPANDER USB 21B 28DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7512AEFC256-7N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512AEFI25610 制造商:ALTERA 功能描述:NEW
EPM7512AEFI256-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512AEFI256-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512AEQC20810 制造商:ALTERA 功能描述:*