參數(shù)資料
型號(hào): EVAL-AD7606-6EDZ
廠商: Analog Devices Inc
文件頁數(shù): 15/36頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR AD7606
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 200k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
在以下條件下的電源(標(biāo)準(zhǔn)): 90mW @ 200kSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD7606-6
已供物品:
AD7606/AD7606-6/AD7606-4
Data Sheet
Rev. C | Page 22 of 36
THEORY OF OPERATION
CONVERTER DETAILS
The AD7606/AD7606-6/AD7606-4 are data acquisition systems
that employ a high speed, low power, charge redistribution,
successive approximation analog-to-digital converter (ADC)
and allow the simultaneous sampling of eight/six/four analog input
channels. The analog inputs on the AD7606/AD7606-6/AD7606-4
can accept true bipolar input signals. The RANGE pin is used to
select either ±10 V or ±5 V as the input range. The AD7606/
AD7606-6/AD7606-4 operate from a single 5 V supply.
The AD7606/AD7606-6/AD7606-4 contain input clamp
protection, input signal scaling amplifiers, a second-order anti-
aliasing filter, track-and-hold amplifiers, an on-chip reference,
reference buffers, a high speed ADC, a digital filter, and high
speed parallel and serial interfaces. Sampling on the AD7606/
AD7606-6/AD7606-4 is controlled using the CONVST signals.
ANALOG INPUT
Analog Input Ranges
The AD7606/AD7606-6/AD7606-4 can handle true bipolar,
single-ended input voltages. The logic level on the RANGE pin
determines the analog input range of all analog input channels.
If this pin is tied to a logic high, the analog input range is ±10 V
for all channels. If this pin is tied to a logic low, the analog input
range is ±5 V for all channels. A logic change on this pin has an
immediate effect on the analog input range; however, there is
typically a settling time of approximately 80 s, in addition to
the normal acquisition time requirement. The recommended
practice is to hardwire the RANGE pin according to the desired
input range for the system signals.
During normal operation, the applied analog input voltage
should remain within the analog input range selected via the
RANGE pin. A RESET pulse must be applied after power up to
ensure the analog input channels are configured for the range
selected.
When in a power-down mode, it is recommended to tie the
analog inputs to GND. Per the Analog Input Clamp Protection
section, the overvoltage clamp protection is recommended for
use in transient overvoltage conditions and should not remain
active for extended periods. Stressing the analog inputs outside
of the conditions mentioned here may degrade the bipolar zero
code error and THD performance of the AD7606/AD7606-6/
AD7606-4.
Analog Input Impedance
The analog input impedance of the AD7606/AD7606-6/
AD7606-4 is 1 M. This is a fixed input impedance that does
not vary with the AD7606 sampling frequency. This high analog
input impedance eliminates the need for a driver amplifier in
front of the AD7606/AD7606-6/AD7606-4, allowing for direct
connection to the source or sensor. With the need for a driver
amplifier eliminated, bipolar supplies (which are often a source
of noise in a system) can be removed from the signal chain.
Analog Input Clamp Protection
Figure 34 shows the analog input structure of the AD7606/
AD7606-6/AD7606-4. Each analog input of the AD7606/
AD7606-6/AD7606-4 contains clamp protection circuitry.
Despite single 5 V supply operation, this analog input clamp
protection allows for an input over voltage of up to ±16.5 V.
1M
CLAMP
Vx
1M
CLAMP
VxGND
SECOND-
ORDER
LPF
RFB
08479-
032
Figure 34. Analog Input Circuitry
Figure 35 shows the voltage vs. current characteristic of the
clamp circuit. For input voltages of up to ±16.5 V, no current
flows in the clamp circuit. For input voltages that are above ±16.5 V,
the AD7606/AD7606-6/AD7606-4 clamp circuitry turns on.
30
–50
–40
–30
–20
–10
0
10
20
–20
–15
–10
–5
0
5
10
15
20
INP
UT
CL
AM
P
CURRE
NT
(
mA)
SOURCE VOLTAGE (V)
08479-
033
AVCC, VDRIVE = 5V
TA = 25°C
Figure 35. Input Protection Clamp Profile
A series resistor should be placed on the analog input channels
to limit the current to ±10 mA for input voltages above ±16.5 V.
In an application where there is a series resistance on an analog
input channel, Vx, a corresponding resistance is required on the
analog input GND channel, VxGND (see Figure 36). If there is
no corresponding resistor on the VxGND channel, an offset
error occurs on that channel. It is recommended that the input
overvoltage clamp protection circuitry be used to protect the
AD7606/AD7606-6/AD7606-4 against transient overvoltage
events. It is not recommended to leave the AD7606/AD7606-6/
AD7606-4 in a condition where the clamp protection circuitry
is active in normal or power-down conditions for extended
periods because this may degrade the bipolar zero code error
performance of the AD7606/AD7606-6/AD7606-4.
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