參數(shù)資料
型號(hào)： EVAL-AD7798EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 5/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD7798
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 470
數(shù)據(jù)接口： 串行
輸入范圍： ±VREF/增益
在以下條件下的電源（標(biāo)準(zhǔn)）： 2.5mW @ 470SPS
工作溫度： -40°C ~ 105°C
已用 IC / 零件： AD7798
已供物品： 板，纜線，CD
Data Sheet
AD7798/AD7799
Rev. B | Page 13 of 28
ON-CHIP REGISTERS
The ADC is controlled and configured via a number of on-chip registers, which are described on the following pages. In the following
descriptions, set implies a Logic 1 state and cleared implies a Logic 0 state, unless otherwise stated.
COMMUNICATION REGISTER
RS2, RS1, RS0 = 0, 0, 0
The communication register is an 8-bit, write-only register. All communication to the part must start with a write operation to the
communication register. The data written to the communication register determines whether the next operation is a read or write
operation, and to which register this operation takes place. After the read or write operation is complete, the interface returns to its
default state, where it expects a write operation to the communication register. In situations where the interface sequence is lost, a write
operation of at least 32 serial clock cycles with DIN high returns the ADC to this default state by resetting the entire part. Table 9 outlines
the bit designations for the communication register. CR0 through CR7 indicate the bit location, with CR denoting that the bits are in the
communication register. CR7 denotes the first bit of the data stream. The number in parentheses indicates the power-on/reset default
status of that bit.
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
WEN(0)
R/W(0)
RS2(0)
RS1(0)
RS0(0)
CREAD(0)
0(0)
Table 9. Communication Register Bit Designations
Bit Location
Bit Name
Description
CR7
WEN
Write Enable Bit. A 0 must be written to this bit so that the write to the communication register occurs.
If a 1 is the first bit written, the part does not clock subsequent bits into the register. It stays at this bit
location until a 0 is written to this bit. Once a 0 is written to the WEN bit, the next seven bits are loaded
to the communication register.
CR6
R/W
Read/Write Bit. A 0 in this bit location indicates that the next operation is a write to a specified register.
A 1 in this position indicates that the next operation is a read from the designated register.
CR5 to CR3
RS2 to RS0
Register Address Bits. These bits are used to select the register during the serial interface communication.
CR2
CREAD
Continuous Read of the Data Register Bit. When this bit is set to 1 and the data register is selected, the
serial interface is configured so that the data register can be continuously read, that is, the contents of
the data register are placed on the DOUT pin automatically when the SCLK pulses are applied after the
RDY pin goes low to indicate that a conversion is complete. The communication register does not have
to be written to for data reads. To enable continuous read mode, the instruction 01011100 must be
written to the communication register. To exit the continuous read mode, the instruction 01011000
must be written to the communication register while the RDY pin is low. While in continuous read mode,
the ADC monitors activity on the DIN line for the instruction to exit continuous read mode. Additionally,
a reset occurs if 32 consecutive 1s are seen on DIN. Therefore, DIN should be held low in continuous read
mode until an instruction is to be written to the device.
CR1 to CR0
0
These bits must be programmed to Logic 0 for correct operation.
Table 10. Register Selection
RS2
RS1
RS0
Register
Register Size
0
Communication register during a write operation
8 bits
0
Status register during a read operation
8 bits
0
1
Mode register
16 bits
0
1
0
Configuration register
16 bits
0
1
Data register
16 bits (AD7798)/24 bits (AD7799)
1
0
ID register
8 bits
1
0
1
IO register
8 bits
1
0
Offset register
16 bits (AD7798)/24 bits (AD7799)
1
Full-scale register
16 bits (AD7798)/24 bits (AD7799)
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