參數(shù)資料
型號(hào)： EVAL-AD7798EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD7798
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 470
數(shù)據(jù)接口： 串行
輸入范圍： ±VREF/增益
在以下條件下的電源（標(biāo)準(zhǔn)）： 2.5mW @ 470SPS
工作溫度： -40°C ~ 105°C
已用 IC / 零件： AD7798
已供物品： 板，纜線，CD
Data Sheet
AD7798/AD7799
Rev. B | Page 17 of 28
DATA REGISTER
RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00)
The conversion result from the ADC is stored in the data register. This is a read-only register. Upon completion of a read operation from
this register, the RDY bit and DOUT/RDY pin are set.
ID REGISTER
RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xX8 (AD7798)/0xX9 (AD7799)
The identification number for the AD7798/AD7799 is stored in the ID register. This is a read-only register.
IO REGISTER
RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00
The IO register is an 8-bit register from which data can be read or to which data can be written. This register is used to select the function
of the AIN3(+)/AIN3() pins. Table 16 outlines the bit designations for the IO register. IO0 through IO7 indicate the bit locations, with
IO denoting that the bits are in the IO register. IO7 denotes the first bit of the data stream. The number in parentheses indicates the
power-on/reset default status of that bit.
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
0(0)
IOEN(0)
IO2DAT(0)
IO1DAT(0)
0(0)
Table 16. IO Register Bit Designations
Bit Location
Bit Name
Description
IO7
0
This bit must be programmed with a Logic 0 for correct operation.
IO6
IOEN
Configures the pins AIN3(+)/P1 and AIN3()/P2 as analog input pins or digital output pins. When
this bit is set, the pins are configured as Digital Output Pins P1 and P2. When this bit is cleared,
these pins are configured as analog input pins AIN3(+) and AIN3().
IO5, IO4
IO2DAT, IO1DAT
P1/P2 Data. When IOEN is set, the data for the Digital Output Pins P1 and P2 is written to Bit IO1DAT
and Bit IO2DAT.
IO3 to IO0
0
These bits must be programmed with a Logic 0 for correct operation.
OFFSET REGISTER
RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000(AD7798)/0x800000 (AD7799)
Each analog input channel has a dedicated offset register that holds the offset calibration coefficient for the channel. This register is
16 bits wide on the AD7798 and 24 bits wide on the AD7799, and its power-on/reset value is 8000(00) hex. The offset register is used in
conjunction with its associated full-scale register to form a register pair. The power-on/reset value is automatically overwritten if an
internal or system zero-scale calibration is initiated by the user. The offset register is a read/write register. However, the AD7798/AD7799
must be in idle mode or power-down mode when writing to the offset register.
FULL-SCALE REGISTER
RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7798)/0x5XXX00 (AD7799)
The full-scale register is a 16-bit register on the AD7798 and a 24-bit register on the AD7799. The full-scale register holds the full-scale
calibration coefficient for the ADC. The AD7798/AD7799 has three full-scale registers, with each channel having a dedicated full-scale
register. The full-scale registers are read/write registers. However, when writing to the full-scale registers, users must place the ADC in
power-down mode or idle mode. Upon power-on, these registers are configured with factory-calibrated, full-scale calibration coefficients,
with the calibration performed at gain = 128, the default gain setting. The default value is automatically overwritten if an internal or
system full-scale calibration is initiated by the user, or the full-scale register is written to.
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