參數(shù)資料
型號: EVAL-ADCMP553BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 14/16頁
文件大小: 0K
描述: BOARD EVALUATION ADCMP553BRMZ
標準包裝: 1
主要目的: 接口,比較器
已用 IC / 零件: ADCMP553
已供物品:
相關產品: ADCMP553BRMZ-ND - IC COMPARATOR PECL/LVPECL 8MSOP
Data Sheet
ADCMP551/ADCMP552/ADCMP553
Rev. A | Page 7 of 16
Pin No.
Mnemonic
Function
ADCMP551
ADCMP552
ADCMP553
12
15
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
13
16
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
15
18
QB
One of Two Complementary Outputs for Channel B. QB is logic low if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
16
19
QB
One of Two Complementary Outputs for Channel B. QB is logic high if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
7
VCC
Positive Supply Terminal.
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