參數(shù)資料
型號： EVAL-ADF4350EB2Z
廠商： Analog Devices Inc
文件頁數(shù)： 27/32頁
文件大小： 0K
描述： EVALUATION BOARD 2 FOR ADF4350
標準包裝： 1
主要目的： 計時，頻率合成器
嵌入式： 否
已用 IC / 零件： ADF4350
主要屬性： 帶 VCO 的單路分數(shù)-N 和整數(shù)-N PLL
次要屬性： USB 接口
已供物品： 板，纜線，CD
ADF4350
Rev. A | Page 4 of 32
B Version
Parameter
Min
Typ
Max
Unit
Conditions/Comments
NOISE CHARACTERISTICS
VCO Phase-Noise Performance6
89
dBc/Hz
10 kHz offset from 2.2 GHz carrier
114
dBc/Hz
100 kHz offset from 2.2 GHz carrier
134
dBc/Hz
1 MHz offset from 2.2 GHz carrier
148
dBc/Hz
5 MHz offset from 2.2 GHz carrier
86
dBc/Hz
10 kHz offset from 3.3 GHz carrier
111
dBc/Hz
100 kHz offset from 3.3 GHz carrier
134
dBc/Hz
1 MHz offset from 3.3 GHz carrier
145
dBc/Hz
5 MHz offset from 3.3 GHz carrier
83
dBc/Hz
10 kHz offset from 4.4 GHz carrier
110
dBc/Hz
100 kHz offset from 4.4 GHz carrier
132
dBc/Hz
1 MHz offset from 4.4 GHz carrier
145
dBc/Hz
5 MHz offset from 4.4 GHz carrier
Normalized Phase Noise Floor
220
dBc/Hz
PLL Loop BW = 500 kHz
Normalized 1/f Noise (PN1_f)8
111
dBc/Hz
10 kHz offset; normalized to 1 GHz
In-Band Phase Noise9
97
dBc/Hz
3 kHz offset from 2113.5 MHz carrier
Integrated RMS Jitter10
0.5
ps
70
dBc
Level of Signal With RF Mute Enabled
40
dBm
1 AC coupling ensures AVDD/2 bias.
2 Guaranteed by design. Sample tested to ensure compliance.
3 ICP is internally modified to maintain constant loop gain over the frequency range.
4 TA = 25°C; AVDD = DVDD = VVCO = 3.3 V; prescaler = 8/9; fREFIN = 100 MHz; fPFD = 25 MHz; fRF = 4.4 GHz.
5 Using 50 Ω resistors to VVCO, into a 50 Ω load. Power measured with auxiliary RF output disabled. The current consumption of the auxiliary output is the same as for the
main output.
6 The noise of the VCO is measured in open-loop conditions.
7 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log FPFD. PNSYNTH = PNTOT 10 log FPFD 20 log N.
8 The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency, fRF,
and at a frequency offset f is given by PN = P1_f + 10log(10 kHz/f) + 20log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL.
9 fREFIN = 100 MHz; fPFD = 25 MHz; offset frequency = 10 kHz; VCO frequency = 4227 MHz, output divide by two enabled. RFOUT = 2113.5 MHz; N = 169; loop BW = 40 kHz,
ICP = 313 μA; low noise mode. The noise was measured with an EVAL-ADF4350EB1Z and the Agilent E5052A signal source analyzer.
10 fREFIN = 100 MHz; fPFD = 25 MHz; VCO frequency = 4400 MHz, RFOUT = 4400 MHz; N = 176; loop BW = 40 kHz, ICP = 313 μA; low noise mode. The noise was measured with
an EVAL-ADF4350EB1Z and the Agilent E5052A signal source analyzer.
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