
FAN5026
PRODUCT SPECIFICATION
REV. 1.0.2b 9/2/03
13
Over-Temperature Protection
The chip incorporates an over temperature protection circuit
that shuts the chip down when a die temperature of about
150°C is reached. Normal operation is restored at die
temperature below 125°C with internal Power On Reset
asserted, resulting in a full soft-start cycle.
Design and Component Selection
Guidelines
As an initial step, define operating input voltage range,
output voltage, minimum and maximum load currents for the
controller.
Setting the Output Voltage
The internal reference is 0.9V. The output is divided down by
a voltage divider to the VSEN pin (for example, R5 and R6
in Figure 4). The output voltage therefore is:
To minimize noise pickup on this node, keep the resistor to
GND (R6) below 2K. We selected R6 at 1.82K. Then choose
R5:
For DDR applications converting from 3.3V to 2.5V, or other
applications requiring high duty cycles, the duty cycle clamp
must be disabled by tying the converter’s FPWM to GND.
When converter’s FPWM is GND, the converter's maximum
duty cycle will be greater than 90%. When using as a DDR
converter with 3.3V input, set up the converter for In-Phase
synchronization by tying the VIN pin to +5V.
Output Inductor Selection
The minimum practical output inductor value is the one that
keeps inductor current just on the boundary of continuous
conduction at some minimum load. The industry standard
practice is to choose the minimum current somewhere from
15% to 35% of the nominal current. At light load, the
controller can automatically switch to hysteretic mode of
operation to sustain high efficiency. The following equations
help to choose the proper value of the output filter inductor.
where
I is the inductor ripple current and
V
OUT
is the
maximum ripple allowed.
for this example we’ll use:
V
IN
= 12V, V
OUT
= 2.5V
I = 25%
×
6A = 1.5A
F
SW
= 300KHz.
therefore
L
≈
4.4
μ
H
Output Capacitor Selection
The output capacitor serves two major functions in a
switching power supply. Along with the inductor it filters the
sequence of pulses produced by the switcher, and it supplies
the load transient currents. The output capacitor require-
ments are usually dictated by ESR, Inductor ripple current
(
I) and the allowable ripple voltage (
V).
In addition, the capacitor’s ESR must be low enough to
allow the converter to stay in regulation during a load step.
The ripple voltage due to ESR for the converter in Figure 5 is
120mV P-P. Some additional ripple will appear due to the
capacitance value itself:
which is only about 1.5mV for the converter in Figure 5 and
can be ignored.
The capacitor must also be rated to withstand the RMS
current which is approximately 0.3 X (
I), or about 400mA
for the converter in Figure 5. High frequency decoupling
capacitors should be placed as close to the loads as
physically possible.
Input Capacitor Selection
The input capacitor should be selected by its ripple current
rating.
Two-Stage Converter Case
In DDR mode (Figure 4), the VTT power input is powered
by the VDDQ output, therefore all of the input capacitor
ripple current is produced by the VDDQ converter. A conser-
vative estimate of the output current required for the 2.5V
regulator is:
As an example, if average I
VDDQ
is 3A, and average I
VTT
is
1A, I
VDDQ
current will be about 3.5A. If average input
voltage is 12V, RMS input ripple current will be:
R6
0.9V
V
--------------------------------
0.9V
–
R5
=
(8a)
R5
1.82K
---------------------------------------------–
(
)
V
0.9
)
3.24K
=
=
(8b)
I
2
I
MIN
×
V
ESR
------------------
=
=
(9)
L
V
F
SW
OUT
I
×
–
----------------V
V
V
IN
--------------
×
=
(10)
ESR
V
I
-------
<
(11)
V
OUT
8
F
SW
×
C
=
(12)
I
REG1
I
VDDQ
I
2
-----------
+
=
I
RMS
I
OUT MAX
)
D
D
2
–
=
(13)