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參數(shù)資料
| 型號(hào)： | FAN5182QSCX_NL |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Adjustable Output 1, 2, or 3-Phase Synchronous Buck Controller |
| 中文描述： | SWITCHING CONTROLLER, 3000 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | LEAD FREE, MO-137AD, QSOP-20 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 788K |
| 代理商： | FAN5182QSCX_NL |
14
www.fairchildsemi.com
FAN5182 Rev. 1.0.1
F
MOSFET’s switching speed (rise and fall time that the gate
driver can offer) and MOSFET input capacitance, the following
expression provides approximate switching loss for each main
MOSFET:
(10)
where:
n
MF
is the total number of main MOSFETs.
R
G
is the total gate resistance (2
for the FAN5009 and about
1
for typical logic level n-channel MOSFETs, total R
G
= 3
).
C
ISS
is the input capacitance of the main MOSFET.
Note that adding more main MOSFETs (n
MF
) does not help to
lower the switching loss for each main MOSFET, it can only
reduces conduction loss. The most efficient way to reduce
switching loss is to use low gate charge / capacitance devices.
The conduction loss of the main MOSFET is given by the follow-
ing equation:
(11)
where R
DS(MF)
is the on resistance of the main MOSFET.
Typically, for main MOSFETs, a low gate charge (C
ISS
) device is
preferred, but low gate charge MOSFETs usually have higher
on resistance. Select a device that meets total power dissipation
around 1.5W for a single D-PAK MOSFET.
In this example, a FDD6296 is selected as the main MOSFET
(three total; n
MF
= 3), with a C
ISS
= 1440pF, and R
DS(MF)
= 9m
(at T
J
= 120°C), and a FDD8896 is selected as the synchronous
MOSFET (three total; n
SF
= 3), with C
ISS
= 2525pF and R
DS(SF)
= 5.4m
(at T
J
= 120°C). The synchronous MOSFET C
ISS
is
less than 6000pF. Solving for the power dissipation per MOS-
FET at I
O
= 55A and I
R
= 6.6A yields 1.56W for each synchro-
nous MOSFET and 1.29W for each main MOSFET. These
numbers comply with the power dissipation limit of around 1.5W
per MOSFET.
One more item that needs to be considered is the power dissi-
pation in the driver for each phase. The gate drive loss is
described in terms of the Q
G
for the MOSFETs, and is given by
the following equation
(12)
where:
Q
GMF
is the total gate charge for each main MOSFET.
Q
GSF
is the total gate charge for each synchronous MOSFET.
I
CC
×
V
CC
in equation (12) represents the driver's standby
power dissipation. For the FAN5009, the maximum dissipation
should be less than 400mW. In this example, with I
CC
= 5mA,
Q
GMF
= 25nC, and Q
GSF
= 50nC, there is 285mW in each
driver, which is below the 400mW dissipation limit. See the
“Thermal Information” table in the FAN5009 datasheet for more
details.
Ramp Resistor Selection
The ramp resistor (R
R
) is used for setting the size of the internal
PWM ramp. The value of this resistor is chosen to provide the
best combination of phase current balance, stability, and tran-
sient response. The following expression is used to determine
the optimum value:
(13)
where:
A
R
is the internal ramp amplifier gain.
A
D
is the current balancing amplifier gain.
R
DS(ON)(SF)
is the equivalent low-side MOSFET on resistance.
C
R
is the internal ramp capacitor value.
The closest standard 1% resistor value is 332k
.. The internal
ramp voltage magnitude can be calculated by using
(14)
The size of the internal ramp can be made larger or smaller. If it
is made larger, stability and transient response improve, but
thermal balance degrades. Likewise, if the ramp is made
smaller, thermal balance improves but transient response and
stability degrade. The factor of three in the denominator of
Equation 13 sets a ramp size with optimal balance for good sta-
bility, transient response, and thermal balance.
Current Limit Setpoint
The current limit threshold of the FAN5182 is set with a 3V
source (V
LIM
) across R
LIM
with a gain of 10.4 mV/μA (A
LIM
).
R
LIM
can be found using
(15)
If R
LIM
is greater than 500k
, the actual current limit threshold
may be lower than the intended value. Hence some adjustment
for R
LIM
may be neeeed. Here, I
LIM
is the average current limit
for the output of the supply. In this example, using the V
DRPMAX
value of 110mV from Equations 6 and 7 and choosing a peak
current limit of 110A for I
LIM
results in R
LIM
= 284k
, for which
287k
is chosen as the nearest 1% value.
The per phase current limit described earlier is determined by
(16)
P
S MF
)
2
f
SW
V
---------------------
I
O
×
n
MF
R
G
n
n
---------
C
ISS
×
×
×
×
×
=
P
C MF
)
D
I
n
MF
---------
2
1
12
-----
n
-------------
I
R
×
n
MF
2
×
+
R
DS MF
)
×
×
=
P
DRV
f
n
-------
n
MF
Q
GMF
n
SF
Q
GSF
×
+
×
(
)
×
I
CC
+
V
CC
×
=
R
R
A
R
DS ON
3
A
D
)
SF
(
)
C
R
×
-------------------------------------L
=
R
R
5
600nH
4.8m
×
3
5pF
×
×
-----------0.2
333k
=
=
V
R
V
R
R
2
K
f
SW
C
R
+
---------------------------------------------------------
=
V
R
0.8
2k
–
)
0.2
5pF
×
0.15
250kHz
×
×
×
332k
+
)
----------------12
805mV
=
=
R
LIM
A
V
DRPMAX
-------------------------------
=
I
PHLIM
V
A
D
R
DS MAX
)
-----------------------------------------------------------------
I
R
2
----
+
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