?2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7930C " Rev. 1.0.2
15
which is normally higher than in normal operation. This
operation is improved when soft-start time is very long.
However, too much startup time enlarges the output
voltage building time at light load. FAN7930C has
overshoot protection at startup. During startup, the
feedback loop is controlled by an internal proportional
gain controller and, when the output voltage reaches the
rated value, it switches to an external compensator after
a transition time of 30 ms. This internal proportional gain
controller   eliminates   overshoot   at   startup   and   an
external    conventional    compensator    takes    over
successfully afterward.
D e p e n d s o n L o a d
V
O U  T
C  O  M  P
S t a  r t u  p   O  v e  r s h  o  o  t
In  t e  r n  a  l C  o  n  t r o  l l e  r
C  o  n  v e  n  t i o  n  a  l C  o  n  t r o  l l e  r
S  t a  r t u  p   O  v e  r s h  o  o  t C  o  n  t r o  l
C  o  n  t r o  l T  r a  n  s i t i o  n
Figure 37.    Startup without Overshoot
9. THD Optimization: Total Harmonic Distortion (THD)
is the factor that dictates how closely input current
shape matches sinusoidal form. The turn-on time of the
PFC controller is almost constant over one AC line
period   due to   the   extremely   low   feedback   control
response. The turn-off time is determined by the current
decrease slope of the boost inductor made by the input
voltage   and   output   voltage.   Once   inductor   current
becomes zero, resonance between C
OSS
and the boost
inductor makes oscillating waveforms at the drain pin
and auxiliary winding. By checking the auxiliary winding
voltage through the ZCD pin, the controller can check
the zero current of boost inductor. At the same time, a
minor delay is inserted to determine the valley position
of drain voltage. The input and output voltage difference
is at its maximum at the zero cross point of AC input
voltage. The current decrease slope is steep near the
zero cross region and more negative inductor current
flows during a drain voltage valley detection time. Such
a negative inductor current cancels down the positive
current flows and input current becomes zero, called
zero-cross distortion in PFC.
1 . 5 V
1 5 0 n s
1 . 4 V
O N
V
ZC  D
t
I
I N  D  U  C  T  O   R
M O S F E T g a t e
I
N  E  G  A  T  I V  E
O N
I I N
I
M  O  S  F  E  T
I
D  I O  D  E
Figure 38.    Input and Output Current Near Input
Voltage Peak
1 . 5 V
1 5 0 n s
1 . 4 V
O N
O  N
V
Z C D
t
I
IN D U C T O R
M O S F E T g a t e
I
N  E  G  A  T  I V  E
O N
O N
I
IN
Figure 39.    Input and Output Current Near Input
Voltage Peak Zero Cross
To improve this, lengthened turn-on time near the zero
cross region is a well-known technique, though the
method may vary and may be proprietary. FAN7930C
optimizes this by sourcing current through the ZCD pin.
Auxiliary winding voltage becomes negative when the
MOSFET turns on and is proportional to input voltage.
The negative clamping circuit of ZCD outputs the
current to maintain the ZCD voltage at a fixed value.
The   sourcing   current   from   the   ZCD   is   directly
proportional to the input voltage. Some portion of this
current is applied to the internal sawtooth generator,
together with a fixed-current source. Theoretically, the
fixed-current source and the capacitor at sawtooth
generator determine the maximum turn-on time when no
current is sourcing at ZCD clamp circuit and available
turn-on time gets shorter proportional to the ZCD
sourcing current.