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參數(shù)資料
| 型號： | FDG6335N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | Tantalum Molded Capacitor; Capacitance: 220uF; Voltage: 6.3V; Case Size: 3.2x6.0 mm; Packaging: Tape & Reel |
| 中文描述： | 700 mA, 20 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | SC-70, 6 PIN |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 66K |
| 代理商： | FDG6335N |
FDG6335N Rev C (W)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V
GS
= 0 V,
I
D
= 250
μ
A
20
V
BV
DSS
T
J
I
DSS
I
GSSF
I
GSSR
I
D
= 250
μ
A, Referenced to 25
°
C
14
mV/
°
C
V
DS
= 16 V,
V
GS
= 12 V,
V
GS
= –12 V, V
DS
= 0 V
V
GS
= 0 V
V
DS
= 0 V
1
μ
A
nA
nA
100
–100
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= –250
μ
A, Referenced to 25
°
C
I
D
= 250
μ
A
0.6
1.1
–2.8
1.5
V
mV/
°
C
V
GS
= 4.5 V, I
D
= 0.7 A
V
GS
= 2.5 V, I
D
= 0.6 A
V
GS
= 4.5 V, I
D
= 0.7 A, T
J
=125°C
V
GS
= 4.5 V,
V
DS
= 5 V
V
DS
= 5 V,
I
D
= 0.7 A
180
293
247
300
400
442
m
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
1
A
S
2.8
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
113
34
16
pF
pF
pF
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
Switching Characteristics
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
(Note 2)
5
7
9
10
15
18
3
1.4
ns
ns
ns
ns
nC
nC
nC
V
DD
= 10 V,
V
GS
= 4.5 V, R
GEN
= 6
I
D
= 1 A,
1.5
1.1
0.24
0.3
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 0.7 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
0.25
1.2
A
V
V
GS
= 0 V,
I
S
= 0.25 A
(Note 2)
0.74
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user's board design. R
θ
JA
= 415°C/W when mounted on a minimum pad .
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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