參數(shù)資料
型號: FIN1017M
廠商: Fairchild Semiconductor
文件頁數(shù): 11/11頁
文件大小: 0K
描述: IC DRIVER 3.3V LVDS HS 8SOIC
標準包裝: 95
類型: 驅(qū)動器
驅(qū)動器/接收器數(shù): 1/0
規(guī)程: LVDS
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 管件
2001 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FIN1017 Rev. 1.0.3
9
FIN
1017
3.3V
LVD
S
,1-
B
it
,H
igh-
Speed
D
if
fe
rent
ial
D
river
Physical Dimensions
SEE DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
LAND PATTERN RECOMMENDATION
SEATING PLANE
0.10 C
C
GAGE PLANE
x 45°
DETAIL A
SCALE: 2:1
PIN ONE
INDICATOR
4
8
1
C
M
BA
0.25
B
5
A
5.60
0.65
1.75
1.27
6.20
5.80
3.81
4.00
3.80
5.00
4.80
(0.33)
1.27
0.51
0.33
0.25
0.10
1.75 MAX
0.25
0.19
0.36
0.50
0.25
R0.10
0.90
0.406
(1.04)
OPTION A - BEVEL EDGE
OPTION B - NO BEVEL EDGE
Figure 21. 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150inch Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
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