參數(shù)資料
型號(hào): FIN1017M
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 2/11頁(yè)
文件大小: 0K
描述: IC DRIVER 3.3V LVDS HS 8SOIC
標(biāo)準(zhǔn)包裝: 95
類型: 驅(qū)動(dòng)器
驅(qū)動(dòng)器/接收器數(shù): 1/0
規(guī)程: LVDS
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 管件
2001 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FIN1017 Rev. 1.0.3
10
FIN
1017
3.3V
LVD
S
,1-
B
it
,H
igh-
Speed
D
if
fe
rent
ial
D
river
Physical Dimensions
0.30 TYP
SEATING PLANE
0.10-0.18
0.13
AB
C
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
AND TIE BAR EXTRUSIONS.
MAB08AREVC
0.50TYP
B. DIMENSIONS ARE IN MILLIMETERS.
A. CONFORMS TO JEDEC REGISTRATION MO-187
-C-
0.17-0.27
0.10
0.00
DETAIL A
0°-8°
0.4 TYP
-B-
0.70±0.10
ALL LEAD TIPS
0.2 CB A
3.1±.1
0.15
PIN #1 IDENT.
0.90 MAX
ALL LEAD TIPS
0.1 C
1.55
8
1
4
2.3±0.1
5
-A
-
0.70
2.
7
0
3.
40
1.00
0.5 TYP
DETAIL A
1.80
GAGE PLANE
0.12
Figure 22. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
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