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參數(shù)資料
| 型號： | FIN224CMLX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SER/DES 24-BIT BIDIR 40-MLP |
| 標準包裝： | 3,000 |
| 功能： | 串行器/解串器 |
| 輸入類型： | LVCMOS |
| 輸出類型： | 串行 |
| 輸入數(shù)： | 24 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 工作溫度： | * |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-MLP（6x6） |
| 包裝： | 帶卷 (TR) |
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FIN224C Rev. 1.0.9
4
SerD
es
FIN
224C
—
24-
B
it
Low-
P
ower
Serializer/D
eserializer
CKREF
STROBE
DP[8:1]
DP[16:9]
DP[17]
DP[18]
DP
DP[24:
S1
S2
DIRI
/DIRO
CKP
CKSO+
CKSO-
DSO+/DSI-
DSO-/DSI+
CKSI+
CKSI-
VDDP VDDS/A
/WE
DP[7:0]
DP[15:8]
A0
/CS0
/CS1
Reset
Baseband
Processor
GND
CKSI+
CKSI-
DSO-/DSI+
DSO+/DSI-
CKSO+
CKSO-
GND
Main Display
16-Bit Controller
/WE
DATA[7:0]
DATA[15:8]
A0
/CS0
VDDP VDDS/A
Serializer
FIN224C
Deserializer
FIN224C
1.8V
2.8V
CKP
DP[8:1]
DP[16:9]
DP
DP[18]
DP[19]
DP[24:20]
S1
S2
DIRI
/DIRO
CKREF
STROBE
2.8V
Main Display
8-Bit Controller
/WE
DATA[7:0]
A0
/CS1
Clock
Source
CKREF
STROBE
DP[
DP
DP[
DP[19]
DP[24:20]
S1
S2
DIRI
/DIRO
CKP
CKSO+
CKSO-
DSO+/DSI-
DSO-/DSI+
CKSI+
CKSI-
VDDP VDDS/A
/WE
DP[7:0]
DP[15:8]
A0
/CS0
/CS1
Reset
Baseband
Processor
GND
CKSI+
CKSI-
DSO-/DSI+
DSO+/DSI-
CKSO+
CKSO-
GND
Main Display
16-Bit Controller
/WE
DATA[7:0]
DATA[15:8]
A0
/CS0
VDDP VDDS/A
Serializer
FIN224C
Deserializer
FIN224C
1.8V
2.8V
CKP
DP
DP[:
DP[17]
DP
DP:
S1
S2
DIRI
/DIRO
CKREF
STROBE
2.8V
Main Display
8-Bit Controller
/WE
DATA[7:0]
A0
/CS1
Clock
Source
Figure 4. Dual-Display Controller Interface Block Diagram
Additional Application Information
Flex Cabling:
The serial I/O information is transmitted at a high serial rate. Care must be taken implementing this serial I/O
flex cable. The following best practices should be used when developing the flex cabling or Flex PCB.
Keep all four differential serial wires the same length.
Do not allow noisy signals over or near differential serial wires. Example: No CMOS traces over differential serial wires.
Design goal of 70 to 130
Ω differential characteristic impedance.
Do not place test points on differential serial wires.
Design differential serial wires a minimum of 2cm away from the antenna.
Visit Fairchild’s website at http://www.fairchildsemi.com/products/interface/userdes.html, contact your sales
representative, or contact Fairchild directly at interface@fairchildsemi.com for applications notes or flex guidelines.
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| FIN224Z WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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