參數(shù)資料
型號(hào): FIN425CMLX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 8/10頁(yè)
文件大?。?/td> 0K
描述: IC SERIALIZER 20BIT 32-MLP
標(biāo)準(zhǔn)包裝: 3,000
功能: 解串器
輸入類型: 串行
輸出類型: LVCMOS
輸入數(shù): 1
輸出數(shù): 20
電源電壓: 1.6 V ~ 3 V
工作溫度: -30°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-MLP(5x5)
包裝: 帶卷 (TR)
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FIN424C / FIN425C Rev. 1.0.0
7
SerD
es
FIN
4
24C
/
FIN
425C
20-
B
it
U
lt
ra-
Low-
P
ower
Serializer
/
D
eserializer
f
o
rC
ont
roller
and
R
G
B
D
isplays
Electrical Specifications
Values valid for over-supply voltage and operating temperature ranges unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
DC Parallel I/O and Serial Characteristics
VIH
Input High Voltage
0.7 x VDDP
VDDP
V
VIL
Input Low Voltage
GND
0.3 x VDDP
V
VOH
Output High Voltage
SLEW=0 IOH=-250A
0.8 x VDDP
V
SLEW=1 IOH=-1mA
VOL
Output Low Voltage
SLEW=0 IOL=250A
0.2 x VDDP
V
SLEW=1 IOL=1mA
IIN
Input Current
-5
5
A
VGO
Serial Input Voltage Ground
Offset
FIN425C to FIN424C
0
V
Z
Serial Transmission Line Impedance
70
100
130
Ω
Power Characteristics
IDYN_FIN424C Dynamic Current FIN424C
VDDA/S=2.75V, VDDP=1.8V,
/STBY=1, /RES=1
5.44MHz
4
mA
IDYN_FIN425C Dynamic Current FIN425C
VDDA/S=2.75V VDDP=1.8V,
/STBY=1, /RES=1, CL=0pF
5.44MHz
5
mA
IBRST_FIN424C Burst Standby Current FIN424C
VDDA/S=2.75V, VDDP=1.8V, /STBY=1,
/RST=1, No STROBE Signal,
1.3
mA
IBRST_FIN425C Burst Standby Current FIN425C
VDDA/S=2.75V, VDDP=1.8V, /STBY=1,
/RST=1, No STROBE Signal, CL=0pF
1.8
mA
ISTBY
Standby Current
FIN424C / FIN425C VDDS/A=VDDP=3.0V,
/STBY=0, /RST=1
10
A
IRES
Reset Current
FIN424C / FIN425C VDDS/A=VDDP=3.0V,
/RST=0
10
A
AC FIN424C Specifications
fWSTRB0
Strobe Frequency
0
10
MHz
tR, tF
Input Edge Rates
40
ns
tS1
DP Setup Time
DP Before STRBn ↑
(7)
5
ns
tH1
DP Hold Time
DP After STRBn ↑
(7)
15
ns
AC FIN425C Specifications
tR0, tF0
Output Edge Rates of WCLK
SLEW=0, CL=5pF 20% to 80%
(7)
8
17
ns
SLEW=1, CL=5pF 20% to 80%
(7)
10
tR1, tF1
Output Edge Rates of DP[19:0]
SLEW=0, CL=5pF 20% to 80%
(7)
8
22
ns
SLEW=1, CL=5pF 20% to 80%
(7)
17
tcs
DP[19:0] to Falling edge of WCLK
CL=5pF 20% to 80%
t
PWL
t
CS
DP
WCLK
t
PWL
t
CS
DP
WCLK
0
4
tPWL
WCLK Output Pulse Width Low,
Measured 30% to 30%
(7)
50
56
ns
AC Oscillator Specifications
fOSC
Serial Operating Frequency
240
275
310
MHz
tOSC-STBY
Oscillator Stabilization Time After
Standby
VDDA=VDDS=2.75V
/RES=1, /STBY
↑ Transition
15
30
s
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