
90
Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 14 through 20 in this data sheet.
(2)
These parameters are preliminary. For the most up-to-date information, contact Altera Applications.
(3)
Using an LE to register the signal may provide a lower setup time.
(4)
This parameter is specified by characterization.
EPF10K130V Device Interconnect Timing Microparameters
Notes (1), (2)
Symbol
-2 Speed Grade
-3 Speed Grade
-4 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
t
DIN2IOE
t
DIN2LE
t
DIN2DATA
t
DCLK2IOE
t
DCLK2LE
t
SAMELAB
t
SAMEROW
t
SAMECOLUMN
t
DIFFROW
t
TWOROWS
t
LEPERIPH
t
LABCARRY
t
LABCASC
8.0
2.4
5.0
3.6
2.4
0.4
4.5
9.0
13.5
18.0
8.1
0.6
0.8
9.0
3.0
6.3
4.6
3.0
0.6
5.3
9.5
14.8
20.1
8.6
0.8
1.0
9.5
3.1
7.4
5.1
3.1
0.8
6.5
9.7
16.2
22.7
9.5
1.0
1.2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
EPF10K130V Device External Timing Parameters
Notes (1), (2)
Symbol
-2 Speed Grade
-3 Speed Grade
-4 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
t
DRR
t
INSU
,
Notes(3) (4)
t
INH
,
Note (4)
t
OUTCO
,
Note (4)
t
ODH
,
Note (4)
15.0
19.1
24.2
ns
ns
ns
ns
ns
6.9
0.0
8.6
0.0
11.0
0.0
7.8
9.9
11.3
2.0
2.0
2.0