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參數(shù)資料
| 型號： | FM24CL64-S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 4Kb FRAM Serial 3V Memory |
| 中文描述： | 4Kb的鐵電串行3V的記憶 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 77K |
| 代理商： | FM24CL64-S |
Ramtron
FM24CL64
9 May 2001
6/6
Figure 5 Byte Write
S
A
Slave Address
0
Address MSB
A
Data Byte
A
P
By Master
By FM24CL64
Start
Address & Data
Stop
Acknowledge
Address LSB
A
Figure 6 Multiple Byte Write
S
A
Slave Address
0
Address MSB
A
Data Byte
A
P
By Master
By FM24CL64
Start
Address & Data
Stop
Acknowledge
Address LSB
A
Data Byte
A
Read Operation
There are two basic types of read operations. They
are current address read and selective address read. In
a current address read, the FM24CL64 uses the
internal address latch to supply the address. In a
selective read, the user performs a procedure to set
the address to a specific value.
Current Address & Sequential Read
As mentioned above the FM24CL64 uses an internal
latch to supply the address for a read operation. A
current address read uses the existing value in the
address latch as a starting place for the read
operation. The system reads from the address
immediately following that of the last operation.
To perform a current address read, the bus master
supplies a device address with the lsb set to 1. This
indicates that a read operation is requested. After
receiving
the
complete
FM24CL64 will begin shifting out data from the
current address on the next clock. The current address
is the value held in the internal address latch.
Beginning with the current address, the bus master
can read any number of bytes. Thus, a sequential read
is simply a current address read with multiple byte
transfers. After each byte the internal address counter
will be incremented.
Each time the bus master acknowledges a byte,
this indicates that the FM24CL64 should read
out the next sequential byte.
There are four ways to properly terminate a read
operation. Failing to properly terminate the read will
device
address,
the
most likely create a bus contention as the FM24CL64
attempts to read out additional data onto the bus. The
four valid methods are as follows.
1. The bus master issues a no-acknowledge in the
9
th
clock cycle and a stop in the 10
th
clock cycle.
This is illustrated in the diagrams below. This is
preferred.
2. The bus master issues a no-acknowledge in the
9
th
clock cycle and a start in the 10
th
.
3. The bus master issues a stop in the 9
th
clock
cycle.
4. The bus master issues a start in the 9
th
clock
cycle.
If the internal address reaches 1FFFh, it will wrap
around to 0000h on the next read cycle. Figures 7 and
8 below show the proper operation for current
address reads.
Selective (Random) Read
There is a simple technique that allows a user to
select a random address location as the starting point
for a read operation. This involves using the first
three bytes of a write operation to set the internal
address followed by subsequent read operations.
To perform a selective read, the bus master sends out
the device address with the lsb set to 0. This specifies
a write operation. According to the write protocol,
the bus master then sends the address bytes that are
loaded into the internal address latch. After the
FM24CL64 acknowledges the address, the bus
master issues a start condition. This simultaneously
aborts the write operation and allows the read
command to be issued with the device address lsb set
to a 1. The operation is now a current address read.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM24CL64-STR | 功能描述:F-RAM 64K (8Kx8) 2.7V RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM24CZ16-C | 制造商:Ramtron International Corporation 功能描述:2K X 8 NON-VOLATILE SRAM, CDIP8 |
| FM-24D-900 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High output, Two Voltage ranges available, Continuous ans pulsing tones |
| FM-24D-901 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High output, Two Voltage ranges available, Continuous ans pulsing tones |
| FM-24D-903 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High output, Two Voltage ranges available, Continuous ans pulsing tones |
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