參數(shù)資料
型號(hào): fp_add_sub
廠商: Altera Corporation
英文描述: Floating-Point Adder/Subtractor(浮點(diǎn)型加法器/減法器)
中文描述: 浮點(diǎn)加法器/減法(浮點(diǎn)型加法器/減法器)
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 132K
代理商: FP_ADD_SUB
Altera Corporation
3
FS 2: fp_add_sub Floating-Point Adder/Subtractor
For example, the binary representation of the number 0.75
below. This example assumes 8 bits for the mantissa (
exponent (
E
).
S
represents the sign bit.
×
2
1
is shown
M
) and 7 bits for the
S
= 1,
M
= 11000000,
E
= 1000001
Similarly, the binary representation of the number 0.625
×
2
–1
is:
S
= 1,
M
= 10100000,
E
= 0111111
Figure 2
shows the block diagram of the
adder.
fp_add_sub
floating-point
Figure 2. fp_add_sub Block Diagram
Programmable
Inversion
Exponent Decision
Logic
SHIFT_A_B
COUNT
1
0
GND
LPM_CLSHIFT
DISTANCE
A
1
0
GND
LPM_CLSHIFT
DISTANCE
B
Post-
Normalizer
Sign Decision
Logic
MSB
EA EB
1
0
ADD_SUB
SA
SB
MA
MB
MA_NORM
MB_NORM
S_OUT
M_OUT
E_OUT
ADD/
SUBTRACT
+
+
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