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參數(shù)資料
| 型號(hào)： | FS6128-07 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PLL Clock Generator IC with VCXO |
| 中文描述： | PLL時(shí)鐘發(fā)生器芯片的石英振蕩器 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | FS6128-07 |
AMERICAN MICROSYSTEMS, INC.
August 2000
American Microsystems, Inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ISO9001
8.8.00
FS6128-07
PLL Clock Generator IC with VCXO
1.0 Features
Matches MK3727 center frequency characteristics
Phase-locked loop (PLL) device synthesizes output
clock frequency from crystal oscillator or external ref-
erence clock
On-chip tunable voltage-controlled crystal oscillator
(VCXO) allows precise system frequency tuning
3.3V supply voltage
Very low phase noise PLL
Use with “pullable” 14pF crystals – no external pad-
ding capacitors required
Small circuit board footprint (8-pin 0.150
″
SOIC)
Custom frequency selections available - contact your
local AMI Sales Representative for more information
Figure 1: Pin Configuration
1
8
2
3
4
7
6
5
XIN
VDD
XTUNE
VSS
VSS
VDD
CLK
XOUT
F
8-pin (0.150
″
) SOIC
2.0 Description
The FS6128 is a monolithic CMOS clock generator IC
designed to minimize cost and component count in digital
video/audio systems.
At the core of the FS6128 is circuitry that implements a
voltage-controlled crystal oscillator (VCXO) when an ex-
ternal resonator (nominally 13.5MHz) is attached. The
VCXO allows device frequencies to be precisely adjusted
for use in systems that have frequency matching re-
quirements, such as digital satellite receivers.
A high-resolution phase-locked loop generates an output
clock (CLK) through a post-divider. The CLK frequency is
ratiometrically derived from the VCXO frequency. The
locking of the CLK frequency to other system reference
frequencies can eliminate unpredictable artifacts in video
systems and reduce electromagnetic interference (EMI)
due to frequency harmonic stacking.
Table 1: Crystal / Output Frequencies
DEVICE
f
XIN
(MHz)
CLK (MHz)
FS6128-07
13.500
27.000
NOTE: Contact AMI for custom PLL frequencies
Figure 2: Block Diagram
VCXO
FS6128-07
PLL
XOUT
XIN
CLK
XTUNE
DIVIDER
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FS6128-07-XTD | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 VCXO CLOCK 27MHZ OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6128-07-XTP | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 VCXO CLOCK 27MHZ RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6131 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable Line Lock Clock Generator IC |
| FS6131_08 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable Line Lock Clock Generator IC |
| FS6131-01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Line Lock Clock Generator IC |
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