參數(shù)資料
型號: FXMAR2104UMX
廠商: Fairchild Semiconductor
文件頁數(shù): 14/15頁
文件大小: 0K
描述: TRANSLATOR 4BIT DUAL 12-UMLP
標準包裝: 5,000
邏輯功能: 變換器,雙向,3 態(tài),開路漏極
位數(shù): 4
輸入類型: 電壓
輸出類型: 電壓
數(shù)據(jù)速率: *
通道數(shù): 4
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 4ns
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: *
供應商設(shè)備封裝: *
包裝: *
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXMAR2104 Rev. 1.0.1
8
FXMAR2104
Dual-Supply,
4-Bit
Voltage
Translator
/
Isolator
/
for
Open-D
rain
and
Push-Pull
Applications
I
2C Bus Isolation
The FXMAR2104 supports I
2C-Bus isolation for the
following conditions:
Bus isolation if bus clear
Bus isolation if either V
CC goes to ground
Bus Clear
Because the I
2C specification defines the minimum SCL
frequency of DC, the SCL signal can be held LOW
forever; however, this condition shuts down the I
2C bus.
The I
2C specification refers to this condition as Bus
Clear. In Figure 6, if slave #2 holds down SCL forever,
the master and slave #1 are not able to communicate
because the FXMAR2104 passes the SCL stuck-LOW
condition from slave #2 to slave #1 as well as the
master. However, if the OE pin is pulled LOW
(disabled), both ports (A and B) are 3-stated. This
results in the FXMAR2104 isolating slave #2 from the
master and slave #1, allowing full communication
between the master and slave #1.
Either VCC to GND
If slave #2 is a camera that is suddenly removed from
the I
2C bus, resulting in V
CCB transitioning from a valid
VCC
(1.65V
5.5V)
to
0V;
the
FXMAR2104
automatically forces all I/Os on both its A and B ports
into 3-state. Once VCCB has reached 0V, full I
2C
communication between the master and slave #1
remains undisturbed.
Figure 6. Bus Isolation
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