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參數(shù)資料
| 型號： | GAL16V8D-10QJN |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 20/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD 8MACRO 5.0V 10NS 20PLCC |
| 標準包裝： | 46 |
| 系列： | GAL®16V8 |
| 可編程類型： | EE PLD |
| 最大延遲時間 tpd(1)： | 10.0ns |
| 電壓電源 - 內(nèi)部： | 4.75 V ~ 5.25 V |
| 宏單元數(shù)： | 8 |
| 工作溫度： | 0°C ~ 75°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC（9x9） |
| 包裝： | 管件 |
GAL16V8
High Performance E2CMOS PLD
Generic Array Logic
1
2
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
4
6
8
9
11
13
14
16
18
1
10
11
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
5
15
PLCC
GAL
16V8
DIP
GAL16V8
Top View
Copyright 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
August 2006
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
16v8_11
Features
HIGH PERFORMANCE E2CMOS TECHNOLOGY
— 3.5 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.0 ns Maximum from Clock Input to Data Output
— UltraMOS Advanced CMOS Technology
50% to 75% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc on Low Power Device
— 45mA Typ Icc on Quarter Power Device
ACTIVE PULL-UPS ON ALL PINS
E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 20-pin PAL Devices with Full
Function/Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
ELECTRONIC SIGNATURE FOR IDENTIFICATION
LEAD-FREE PACKAGE OPTIONS
Description
The GAL16V8, at 3.5 ns maximum propagation delay time, com-
bines a high performance CMOS process with Electrically Eras-
able (E2) floating gate technology to provide the highest speed
performance available in the PLD market. High speed erase times
(<100ms) allow the devices to be reprogrammed quickly and ef-
ficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. An important subset of the many architecture configura-
tions possible with the GAL16V8 are the PAL architectures listed
in the table of the macrocell description section. GAL16V8 devices
are capable of emulating any of these PAL architectures with full
function/fuse map/parametric compatibility.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lattice
Semiconductor delivers 100% field programmability and function-
ality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
Functional Block Diagram
Pin Configuration
1
10
11
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
5
15
SOIC
GAL
16V8
Top
View
Lead-Free
Package
Options
Available!
I/CLK
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
CLK
8
OE
OLMC
PROGRAMMABLE
AND-ARRA
Y
(64
X
32)
I/OE
ALL
DEVICES
DISCONTINUED
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GAL16V8D-10QP | 功能描述:SPLD - 簡單可編程邏輯器件 16 INPUT 8 OUTPUT 5V 1/4 POWER 10ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| GAL16V8D-10QPN | 功能描述:SPLD - 簡單可編程邏輯器件 16 INPUT 8 OUTPUT 5V 1/4 POWER 10ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| GAL16V8D-15LD/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High Performance E2CMOS PLD Generic Array Logic |
| GAL16V8D-15LD/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| GAL16V8D15LJ | 制造商:LATTICE 功能描述:* 制造商:Lattice Semiconductor Corporation 功能描述: |
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