參數(shù)資料
型號(hào)： GS816036AGT-250I
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 512K X 36 CACHE SRAM, 5.5 ns, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 1/23頁(yè)
文件大?。?/td> 481K
代理商： GS816036AGT-250I
Rev: 1.03a 5/2003
1/23
2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS816018/32/36AT-300/250/200/150
1M x 18, 512K x 32, 512K x 36
18Mb Sync Burst SRAMs
300 MHz–150 MHz
2.5 V or 3.3 V VDD
2.5 V or 3.3 V I/O
100-Pin TQFP
Commercial Temp
Industrial Temp
Preliminary
Features
FT pin for user-configurable flow through or pipeline
operation
Single Cycle Deselect (SCD) operation
2.5 V or 3.3 V +10%/–10% core power supply
2.5 V or 3.3 V I/O supply
LBO pin for Linear or Interleaved Burst mode
Internal input resistors on mode pins allow floating mode pins
Default to Interleaved Pipeline mode
Byte Write (BW) and/or Global Write (GW) operation
Internal self-timed write cycle
Automatic power-down for portable applications
JEDEC-standard 100-lead TQFP package
Functional Description
Applications
The GS816018/32/36AT is an 18,874,368-bit (16,777,216-bit
for x32 version) high performance synchronous SRAM with a
2-bit burst address counter. Although of a type originally
developed for Level 2 Cache applications supporting high
performance CPUs, the device now finds application in
synchronous SRAM applications, ranging from DSP main
store to networking chip set support.
Controls
Addresses, data I/Os, chip enables (E1, E2, E3), address burst
control inputs (ADSP, ADSC, ADV), and write control inputs
(Bx, BW, GW) are synchronous and are controlled by a
positive-edge-triggered clock input (CK). Output enable (G)
and power down control (ZZ) are asynchronous inputs. Burst
cycles can be initiated with either ADSP or ADSC inputs. In
Burst mode, subsequent burst addresses are generated
internally and are controlled by ADV. The burst address
counter may be configured to count in either linear or
interleave order with the Linear Burst Order (LBO) input. The
Burst function need not be used. New addresses can be loaded
on every cycle with no degradation of chip performance.
Flow Through/Pipeline Reads
The function of the Data Output register can be controlled by
the user via the FT mode pin (Pin 14). Holding the FT mode pin
low places the RAM in Flow Through mode, causing output
data to bypass the Data Output Register. Holding FT high
places the RAM in Pipeline mode, activating the rising-edge-
triggered Data Output Register.
Byte Write and Global Write
Byte write operation is performed by using Byte Write enable
(BW) input combined with one or more individual byte write
signals (Bx). In addition, Global Write (GW) is available for
writing all bytes at one time, regardless of the Byte Write
control inputs.
Sleep Mode
Low power (Sleep mode) is attained through the assertion
(High) of the ZZ signal, or by stopping the clock (CK).
Memory data is retained during Sleep mode.
Core and Interface Voltages
The GS816018/32/36AT operates on a 2.5 V or 3.3 V power
supply. All input are 3.3 V and 2.5 V compatible. Separate
output power (VDDQ) pins are used to decouple output noise
from the internal circuits and are 3.3 V and 2.5 V compatible.
Parameter Synopsis
-300
-250
-200
-150
Unit
Pipeline
3-1-1-1
tKQ(x18/x36)
tCycle
2.5
3.3
2.5
4.0
3.0
5.0
3.8
6.7
ns
Curr (x18)
Curr (x32/x36)
335
390
280
330
230
270
185
210
mA
Flow Through
2-1-1-1
tKQ
tCycle
5.0
5.5
6.5
7.5
ns
Curr (x18)
Curr (x32/x36)
230
270
210
240
185
205
170
190
mA
相關(guān)PDF資料
PDF描述
GS8160E36GT-250 512K X 36 CACHE SRAM, 5.5 ns, PQFP100
GS816118AGT-200IT 1M X 18 CACHE SRAM, 6.5 ns, PQFP100
GS8161E18GT-166I 1M X 18 CACHE SRAM, 7 ns, PQFP100
GS8162V18AGB-350I 1M X 18 CACHE SRAM, 4.5 ns, PBGA119
GS8162Z72CGC-250IVT 256K X 72 ZBT SRAM, 5.5 ns, PBGA209
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS816036BGT-150 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
GS816036BGT-150I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
GS816036BGT-150IV 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
GS816036BGT-150T 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Tape and Reel
GS816036BGT-150V 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*