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參數(shù)資料
| 型號(hào)： | GS816037T-133I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 512K X 36 CACHE SRAM, 3.5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁(yè)數(shù)： | 7/29頁(yè) |
| 文件大?。?/td> | 901K |
| 代理商： | GS816037T-133I |
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Rev: 1.00 3/2002
10/24
2002, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary
GS816019/33/37T-250/225/200/166/150/133
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
W
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Simplified State Diagram with G
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
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| GS8160E18BGT-150 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays |
| GS8160E18BGT-150I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays |
| GS8160E18BGT-150IV | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays |
| GS8160E18BGT-150V | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays |
| GS8160E18BGT-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 18MBIT 1MX18 6.5NS/3NS 100TQFP - Trays |
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