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參數(shù)資料
| 型號(hào)： | GS832032AGT-200 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | CACHE SRAM, PQFP100 |
| 封裝： | ROHS COMPLIANT, TQFP-100 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大小： | 583K |
| 代理商： | GS832032AGT-200 |
Mode Pin Functions
Mode Name
Pin Name
State
Function
Burst Order Control
LBO
L
Linear Burst
H
Interleaved Burst
Output Register Control
FT
L
Flow Through
H or NC
Pipeline
Power Down Control
ZZ
L or NC
Active
H
Standby, IDD = ISB
GS832018/32/36AGT-400/375/333/250/200/150
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00a 2/2011
7/23
2011, GSI Technology
Note:
There is a pull-up device on the FT pin and a pull-down device on the ZZ pin , so this input pin can be unconnected and the chip will operate in
the default states as specified in the above tables.
Note:
The burst counter wraps to initial state on the 5th clock.
Note:
The burst counter wraps to initial state on the 5th clock.
Linear Burst Sequence
A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
Burst Counter Sequences
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS832032AGT-250 | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250I | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250IV | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250V | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-333 | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
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