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參數(shù)資料
| 型號(hào)： | GS84032 |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 4Mb（128K x 32Bit) Synchronous Burst SRAM(4M位（128K x 32位）同步靜態(tài)RAM（帶2位脈沖地址計(jì)數(shù)器）) |
| 中文描述： | 4Mb的（128K的x 32位）同步突發(fā)靜態(tài)存儲(chǔ)器（4分位（128K的× 32位）同步靜態(tài)隨機(jī)存儲(chǔ)器（帶2位脈沖地址計(jì)數(shù)器）） |
| 文件頁(yè)數(shù)： | 11/31頁(yè) |
| 文件大?。?/td> | 627K |
| 代理商： | GS84032 |
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Rev: 2.05 6/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
11/31
1999, Giga Semiconductor, Inc.
.
GS84018/32/36T/B-180/166/150/100
Mode Pin Functions
Note:
There are pull up devices on LBO and FT pins and a pull down device on the ZZ pin, so those input pins can be unconnected and the chip will
operate in the default states as specified in the above tables.
Burst Counter Sequences
Linear Burst Sequence
Byte Write Truth Table
Note:
1.
2.
3.
4.
All byte outputs are active in read cycles regardle
ss
of the state of Byte Write Enable inputs.
Byte Write Enable inputs B
A
, B
B
, B
C
and/or B
D
may be used in any combination with BW to write single or multiple bytes.
All byte I/O’s remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
Bytes “
C
” and “
D
” are only available on the x32 and x36 versions.
Mode Name
Pin Name
State
L
H or NC
L
H or NC
L or NC
Function
Linear Burst
Interleaved Burst
Flow Through
Pipeline
Active
Standby, I
DD
= I
SB
Burst Order Control
LBO
Output Register Control
FT
Power Down Control
ZZ
H
Function
GW
BW
B
A
B
B
B
C
B
D
Notes
Read
H
H
X
X
X
X
1
Read
H
L
H
H
H
H
1
Write byte
A
H
L
L
H
H
H
2, 3
Write byte
B
H
L
H
L
H
H
2, 3
Write byte
C
H
L
H
H
L
H
2, 3, 4
Write byte
D
H
L
H
H
H
L
2, 3, 4
Write all bytes
H
L
L
L
L
L
2, 3, 4
Write all bytes
L
X
X
X
X
X
Note: The burst counter wraps to initial state on the 5th clock.
I
nterleaved Burst Sequence
Note: The burst counter wraps to initial state on the 5th clock.
A[1:0]
00
01
10
11
A[1:0]
01
10
11
00
A[1:0]
10
11
00
01
A[1:0]
11
00
01
10
1st address
2nd address
3rd address
4th address
A[1:0]
00
01
10
11
A[1:0]
01
00
11
10
A[1:0]
10
11
00
01
A[1:0]
11
10
01
00
1st address
2nd address
3rd address
4th address
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參數(shù)描述 |
|---|---|
| GS84032AB-100 | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 3.3V 4MBIT 128KX32 12NS/4.5NS 119FBGA - Trays |
| GS84032AB-100I | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 3.3V 4MBIT 128KX32 12NS/4.5NS 119FBGA - Trays |
| GS84032AB-150 | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 3.3V 4MBIT 128KX32 10NS/3.8NS 119FBGA - Trays |
| GS84032AB-150I | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 3.3V 4MBIT 128KX32 10NS/3.8NS 119FBGA - Trays |
| GS84032AB-166 | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 3.3V 4MBIT 128KX32 8.5NS/3.5NS 119FBGA - Trays |
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