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參數(shù)資料
| 型號(hào)： | GS880E18 |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 8Mb（512K x 18Bit) Synchronous Burst SRAM(8M位（512K x 18位）同步靜態(tài)RAM（帶2位脈沖地址計(jì)數(shù)器）) |
| 中文描述： | 8MB的（為512k × 18位）同步突發(fā)靜態(tài)存儲(chǔ)器（800萬位（為512k × 18位）同步靜態(tài)隨機(jī)存儲(chǔ)器（帶2位脈沖地址計(jì)數(shù)器）） |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 850K |
| 代理商： | GS880E18 |
Rev: 1.11 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
10/25
2000, Giga Semiconductor, Inc.
Preliminary
GS880E18/32/36T-11/11.5/100/80/66
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
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相關(guān)代理商/技術(shù)參數(shù) |
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| GS880E18AT | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E18AT-133 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E18AT-133I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E18AT-150 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
| GS880E18AT-150I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs |
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