參數資料
型號: GS88236BGB-200V
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
中文描述: 256K X 36 CACHE SRAM, 6.5 ns, PBGA119
封裝: ROHS COMPLIANT, FPBGA-119
文件頁數: 20/35頁
文件大小: 1164K
代理商: GS88236BGB-200V
GS88218/36B(B/D)-xxxV
Rev: 1.04 6/2007
27/35
2002, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
1
RFU
011
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
1
RFU
110
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1. Instruction codes expressed in binary, MSB on left, LSB on right.
2. Default instruction automatically loaded at power-up and in test-logic-reset state.
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