參數(shù)資料
型號: HA12240FP
廠商: Renesas Technology Corp.
英文描述: 150000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述: 總線接口驅(qū)動器/接收器IC
文件頁數(shù): 3/24頁
文件大小: 163K
代理商: HA12240FP
HA12240FP
Rev.1.0, Dec.01.2003, page 3 of 23
Absolute Maximum Ratings
(Ta = 25°C)
Note
Ta
85°C
Item
Power-supply voltage
Input voltage
Bus input voltage
Allowable power dissipation
Operating temperature
Storage temperature
Note: Recommended operating power supply voltage range: 5 V ± 0.5 V
Electrical Characteristics
Symbol
V
CC
V
IN
Vbus
Pd
Topr
Tstg
Ratings
7
GND–0.3 to V
CC
+0.3
18
400
–40 to +85
–55 to +125
Unit
V
V
V
mW
°C
°C
(V
CC
= 5.0 V, Ta = 25°C)
Test
Pin
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Test
Circuit
High-level input voltage
V
IHS1
2.1
V
V1 = 0
5 V, V3 = 0 V,
V6 – V5 = 110 mV
V1 = 5
0 V, V3 = 0 V,
V6 – V5 = 30 mV
1
Low-level input voltage
V
ILS1
1.65
V
1
High-level input current
Low-level input current
I
IHS1
I
ILS1
V
IHS2
1
1
μ
A
μ
A
V1 = 5 V, V3 = 0 V
V1 = 0 V, V3 = 0 V
V3 = 0
5 V, V1 = 0 V,
V6 – V5 = 110 mV
V3 = 5
0 V, V1 = 0 V,
V6 – V5 = 30 mV
1
1
S1
Fig. 1
High-level input voltage
2.1
V
3
Low-level input voltage
V
ILS2
1.65
V
3
High-level input current
Low-level input current
I
IHS2
I
ILS2
V
OHD+
1
1
μ
A
μ
A
V1 = 0 V, V3 = 5 V
V1 = 0 V, V3 = 0 V
3
3
S2
Fig. 1
High-level output
voltage (+)
High-level output
voltage (–)
1.8
2.5
3.2
V
V1 = 5 V, V3 = 0 V
6
V
OHD–
1.8
2.5
3.2
V
V1 = 5 V, V3 = 0 V
5
High-level output
current
Low-level output
current
I
OH
3.1
3.8
4.5
mA
V1 = 5 V, V3 = 0 V,
I
OH
= ((V
OHD+
) – (V
OHD–
))/60
V1 = 0 V, V3 = 0 V,
I
OL
= ((V
OP+
) – (V
OP–
))/R
I
V1 = 0 V, V3 = 0 V
V1 = 0 V, V3 = 0 V
5, 6
Driver
I
OL
1
μ
A
5, 6
Fig. 1
Reference operating voltage (+)
Reference operating voltage (–)
Driver output resistance *
1
V
OP+
V
OP–
R
O
2.3
2.3
2.5
2.5
2.7
2.7
V
V
k
6
5
Fig. 1
Fig. 1
5
10
15
V1 = 5 V, V3 = 0 V, V8 = 5 V,
R
O
= 0.6 V/(I6A – I6B)
Fig. 3
Note: 1. Measure the current when V6 = (V
OP+
) + 0.3 V to make I6A and measure the current when V6 = (V
OP+
) – 0.3
V to make I6B.
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