參數(shù)資料
型號: HA16114PJ
廠商: Hitachi,Ltd.
元件分類: 基準電壓源/電流源
英文描述: RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述: 抗輻射高效,5安培開關穩(wěn)壓器
文件頁數(shù): 10/38頁
文件大?。?/td> 275K
代理商: HA16114PJ
HA16114P/PJ/FP/FPJ, HA16120FP/FPJ
10
2.2 Error Amplifier Usage
Figure 2.3 shows an equivalent circuit of the error amplifier. The error amplifier in these ICs is a simple
NPN-transistor differential amplifier with a constant-current-driven output circuit.
The amplifier combines a wide bandwidth (f
T
= 4 MHz) with a low open-loop gain (50 dB Typ), allowing
stable feedback to be applied when the power supply is designed. Phase compensation is also easy.
IN(
)
IN(+)
E/O
40 A
80 A
IC internal V
IN
To internal PWM
comparator
Figure 2.3 Error Amplifier Equivalent Circuit
3. Dead-Band Duty Cycle and Soft-Start Settings
3.1 Dead-Band Duty Cycle Setting
The dead-band duty cycle (the maximum duty cycle of the PWM pulse output) can be programmed by the
voltage V
DB
at the DB pin. A convenient way to obtain V
DB
is to divide the IC’s Vref output by two
external resistors. The dead-band duty cycle (DB) and V
DB
can be calculated as follows.
V
DB
= Vref
×
R
2
R
1
+ R
2
DB =
This applies when V
DB
> V
TL
.
If V
DB
< V
TL
, there is no PWM output.
V
TH
V
DB
V
TH
V
TL
×
100 (%)
Note:
V
DB
is the voltage at the DB pin.
V
TH
: 1.6 V (Typ)
V
TL
: 1.0 V (Typ)
Vref is typically 2.5 V. Select R
1
and R
2
so that 1.0 V
V
DB
1.6 V.
+
+
Sawtooth
wave
Sawtooth wave
Voltage at DB pin
V
TH
V
DB
V
TL
To Vref
R
R
V
DB
DB
E/O
PWM
COMP
from
UVL
Dead band
1
2
V
TH
and V
TL
vary depending on the oscillator.
Select constants by testing under implementation
conditions.
Note:
Figure 3.1 Dead-Band Duty Cycle Setting
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