13
Ring trip detection is accomplished with the internal ring trip
comparator and the external circuitry shown in Figure 19. The
process of ring trip is initiated when the logic input pins are in the
following states: E0 = 0, E1 = 1/0, C1 = 1 and C2 = 0. This logic
condition connects the ring trip comparator to the DET output,
and causes the Ringrly pin to energize the ring relay. The ring
relay connects the tip and ring of the phone to the external
circuitry in Figure 19. When the phone is on-hook the DT pin is
more positive than the DR pin and the DET output is high. For
off-hook conditions DR is more positive than DT and DET goes
low. When DET goes low, indicating that the phone has gone
off-hook, the SLIC is commanded by the logic inputs to go into
the active state. In the active state, tip and ring are once again
connected to the phone and normal operation ensues.
Figure 19 illustrates battery backed unbalanced ring injected
ringing. For tip injected ringing just reverse the leads to the
phone. The ringing source could also be balanced.
NOTE: The DET output will toggle at 20Hz because the DT input is
not completely filtered by CRT. Software can examine the duty cycle
and determine if the DET pin is low for more that half the time, if so
the off-hook condition is indicated.
Longitudinal Impedance
The feedback loop described in Figure 20(A, B) realizes the
desired longitudinal impedances from tip to ground and from
ring to ground. Nominal longitudinal impedance is resistive
and in the order of 22
.
In the presence of longitudinal currents this circuit attenuates
the voltages that would otherwise appear at the tip and ring
terminals, to levels well within the common mode range of
the SLIC. In fact, longitudinal currents may exceed the
programmed DC loop current without disturbing the SLIC’s
VF transmission capabilities.
The function of this circuit is to maintain the tip and ring
voltages symmetrically around VBAT/2, in the presence of
longitudinal currents. The differential transconductance
amplifiers GT and GR accomplish this by sourcing or sinking
the required current to maintain VC at VBAT/2.
When a longitudinal current is injected onto the tip and ring
inputs, the voltage at VC moves from it’s equilibrium value
VBAT/2. When VC changes by the amount VC, this change
appears between the input terminals of the differential
transconductance amplifiers GT and GR. The output of GT
and GR are the differential currents I1 and I2, which in
turn feed the differential inputs of current sources IT and IR
respectively. IT and IR have current gains of 250 single
ended and 500 differentially, thus leading to a change in IT
and IR that is equal to 500(I) and 500(I2).
The circuit shown in Figure 20(B) illustrates the tip side of
the longitudinal network. The advantages of a differential
input current source are: improved noise since the noise due
to current source 2IO is now correlated, power savings due
to differential current gain and minimized offset error at the
Operational Amplifier inputs via the two 5k
resistors.
Digital Logic Inputs
Table 1 is the logic truth table for the TTL compatible logic
input pins. The HC5513 has two enable inputs pins (E0, E1)
and two control inputs pins (C1, C2).
The enable pin E0 is used to enable or disable the DET
output pin. The DET pin is enabled if E0 is at a logic level 0
and disabled if E0 is at a logic level 1.
The enable pin E1 gates the ground key detector to the DET
output with a logic level 0, and gates the loop or ring trip
detector to the DET output with a logic level 1.
A combination of the control pins C1 and C2 is used to select
1 of the 4 possible operating states. A description of each
operating state and the control logic follow:
Open Circuit State (C1 = 0, C2 = 0)
In this state the SLIC is effectively off. All detectors and both
the tip and ring line drive amplifiers are powered down,
presenting a high impedance to the line. Power dissipation is
at a minimum.
Active State (C1 = 0, C2 = 1)
The tip output is capable of sourcing loop current and for open
circuit conditions is about -4V from ground. The ring output is
capable of sinking loop current and for open circuit conditions is
about VBAT + 4V. VF signal transmission is normal. The loop
current and ground key detectors are both active, E0 and E1
determine which detector is gated to the DET output.
Ringing State (C1 = 1, C2 = 0)
The ring relay driver and the ring trip detector are activated.
Both the tip and ring line drive amplifiers are powered down.
Both tip and ring are disconnected from the line via the
external ring relay.
Standby State (C1 = 1, C2 = 1)
Both the tip and ring line drive amplifiers are powered down.
Internal resistors are connected between tip to ground and ring
to VBAT to allow loop current detect in an off-hook condition.
The loop current and ground key detectors are both active, E0
and E1 determine which detector is gated to the DET output.
TIP
RING
HC5513
RRT
VBAT
ERG
R3
R4
R2
R1
DR
DT
RING TRIP
COMPARATOR
DET
CRT
RINGRLY
RING
RELAY
+
-
FIGURE 19. RING TRIP CIRCUIT FOR BATTERY BACKED RINGING
HC5513