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參數(shù)資料
| 型號(hào)： | HCTS20D |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened Dual 4-Input NAND Gate |
| 中文描述： | 輻射加固雙路4輸入與非門 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 132K |
| 代理商： | HCTS20D |
420
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
HCTS20MS
Radiation Hardened
Dual 4-Input NAND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-183S CDIP2-T14
TOP VIEW
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-183S CDFP3-F14
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
An
Bn
Cn
Dn
Yn
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
H
L
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care
A1
B1
NC
C1
D1
Y1
GND
VCC
D2
C2
NC
B2
A2
Y2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
B1
NC
C1
D1
Y1
GND
VCC
D2
C2
NC
B2
A2
Y2
An
Bn
Yn
Cn
Dn
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS20MS is a Radiation Hardened Dual 4-Input
NAND Gate. A low on any input forces the output to a High state.
The HCTS20MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS20MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
SCREENING
LEVEL
PACKAGE
HCTS20DMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead SBDIP
HCTS20KMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
HCTS20D/
Sample
+25
o
C
Sample
14 Lead SBDIP
HCTS20K/
Sample
+25
o
C
Sample
14 Lead Ceramic
Flatpack
HCTS20HMSR
+25
o
C
Die
Die
September 1995
Spec Number
518619
File Number
3051.1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS20DMSR | 16-Bit D-type Edge-Triggered Flip-Flops With 3-State Outputs 48-CFP -55 to 125 |
| HCTS20HMSR | Radiation Hardened Dual 4-Input NAND Gate |
| HCTS20K | Radiation Hardened Dual 4-Input NAND Gate |
| HCTS20MS | Octal Buffers/Drivers With 3-State Outputs 20-LCCC -55 to 125 |
| HCTS244KMSR | Radiation Hardened Octal Buffer/Line Driver, Three-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS20D/SAMPLE | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 4-Input NAND Gate |
| HCTS20DMSR | 制造商:Intersil Corporation 功能描述:RAD HARD DUAL 4-INPUT NAND GATE,DIP,200KRAD,TTL,CLASS V - Rail/Tube |
| HCTS20HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 4-Input NAND Gate |
| HCTS20K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 4-Input NAND Gate |
| HCTS20K/SAMPLE | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 4-Input NAND Gate |
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