HD404449 Series
31
Stop Mode:
In stop mode, all MCU operations stop and RAM data is retained. Therefore, the power
dissipation in this mode is the least of all modes. The OSC
1
and OSC
2
oscillator stops. Operation of the
X1 and X2 oscillator can be selected by setting bit 3 of the system clock select register (SSR: $029;
operating: SSR3 = 0, stop: SSR3 = 1) (figure 26). The MCU enters stop mode if the STOP instruction is
executed in active mode when bit 3 of timer mode register A (TMA: $008) is set to 0 (TMA3 = 0) (figure
41).
Stop mode is terminated by a RESET input or a
STOPC
input as shown in figure 16. RESET or
STOPC
must be applied for at least one t
RC
to stabilize oscillation (refer to the AC Characteristics section). When
the MCU restarts after stop mode is cancelled, all RAM contents before entering stop mode are retained,
but the accuracy of the contents of the accumulator, B register, W register, X/SPX register, Y/SPY register,
carry flag, and serial data register cannot be guaranteed.
Stop mode
Oscillator
Internal
clock
STOP instruction execution
t
res
≥
t
RC
(stabilization period)
t
res
RESET
STOPC
Figure 16 Timing of Stop Mode Cancellation
Watch Mode:
In watch mode, the clock function (timer A) using the X1 and X2 oscillator operates but
other function operations stop. Therefore, the power dissipation in this mode is the second least to stop
mode, and this mode is convenient when only clock display is used. In this mode, the OSC
1
and OSC
2
oscillator stops, but the X1 and X2 oscillator operates. The MCU enters watch mode if the STOP
instruction is executed in active mode when TMA3 = 1, or if the STOP or SBY instruction is executed in
subactive mode.
Watch mode is terminated by a RESET input or a timer-A/
INT
0
interrupt request. For details of RESET
input, refer to the Stop Mode section. When terminated by a timer-A/
INT
0
interrupt request, the MCU
enters active mode if LSON is 0, or subactive mode if LSON is 1. After an interrupt request is generated,
the time required to enter active mode is t
RC
for a timer A interrupt, and T
X
(where T + t
RC
< T
X
< 2T + t
RC
)
for an
INT
0
interrupt, as shown in figure 17.
Operation during mode transition is the same as that at standby mode cancellation (figure 15).