9.6.2 Port 5 Registers
Register Configuration:
Table 9-8 lists the registers of port 5.
Table 9-8 Port 5 Registers
Name
Port 5 data direction register
Port 5 data register
Abbreviation
P5DDR
P5DR
Read/Write
W
R/W
Initial Value
H'00
H'00
Address
H'FE88
H'FE8A
1. Port 5 Data Direction Register (P5DDR)—H'FE88
P5DDR is an 8-bit register that selects the direction of each pin in port 5.
Single-Chip Mode:
A pin functions as an output pin if the corresponding bit in P5DDR is set to
1, and as an input pin if the bit is cleared to 0.
P5DDR can be written but not read. An attempt to read this register does not cause an error, but
all bits are read as 1, regardless of their true values.
At a reset and in the hardware standby mode, P5DDR is initialized to H'00, making all eight pins
input pins. P5DDR is not initialized in the software standby mode, so if a P5DDR bit is set to 1
when the chip enters the software standby mode, the corresponding pin continues to output the
value in the port 5 data register.
Expanded Modes Using On-Chip ROM (Modes 2 and 4):
If a 1 is set in P5DDR, the
corresponding pin is used for address output. If a 0 is set in P5DDR, the pin is used for general-
purpose input. P5DDR is initialized to H'00 at a reset and in the hardware standby mode.
Expanded Modes Not Using On-Chip ROM (Modes 1 and 3):
All bits of P5DDR are fixed at
1 and cannot be modified. Port 5 is used for address output.
Bit
7
6
5
4
3
2
1
0
P5
7
DDR P5
6
DDR P5
5
DDR P5
4
DDR P5
3
DDR P5
2
DDR P5
1
DDR P5
0
DDR
Initial value
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
160