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Hitachi Embedded Workshop User Manual
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2.6
Exception Processing
The simulator/debugger detects the generation of TRAPA instructions (H8/300H, H8S series only) and trace
exceptions (H8S series only) and simulates exception processing. Accordingly, simulation can be performed
even when an exception occurs.
The simulator/debugger simulates exception processing with the following procedures.
1. Detects an exception during instruction execution.
2. Saves the PC and SR in the stack area. EXR is also saved when the enabled bit of EXR is on. If an error
occurs when saving, the simulator/debugger suspends exception processing, displays the generation of the
exception processing error, and returns to the command-wait state.
3. Sets the I bits in CCR to 1.
4. Reads the start address from the vector address corresponding to the vector number. If an error occurs
when reading, the simulator/debugger suspends exception processing, displays the generation of the
exception processing error, and returns to the command-wait state.
5. Starts instruction execution from the start address. If the start address is 0, the simulator/debugger stops
exception processing, displays that an exception processing error has occurred, and enters the command
input wait state.