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參數(shù)資料
| 型號(hào)： | HD74AC283 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Octal Buffers And Drivers With 3-State Outputs 20-CDIP -55 to 125 |
| 中文描述： | 4位二進(jìn)制全加器的快速卡里 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 63K |
| 代理商： | HD74AC283 |
HD74AC283/HD74ACT283
2
Logic Symbol
C
0
C
4
A
0
S
0
S
1
S
2
S
3
A
1
A
2
A
3
B
1
B
2
B
3
B
0
Pin Names
A
0
– A
3
B
0
– B
3
C
0
S
0
– S
3
C
4
A Operand Inputs
B Operand Inputs
Carry Input
Sum Outputs
Carry Output
Functional Description
The HD74AC283/HD74ACT283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C
0
).
The binary sum appears on the Sum (S
0
– S
3
) and outgoing carry (C
4
) outputs. The binary weight of the
various inputs and outputs is indicated by the subscript numbers, representing powers of two.
2
0
(A
0
+ B
0
+ C
0
) + 2
1
(A
1
+ B
1
) + 2
2
(A
2
+ B
2
) + 2
3
(A
3
+ B
3
) = S
0
+ 2S
1
+ 4S
2
+ 8S
3
+ 16C
4
Where (+) = plus
Interchanging inputs of equal weight does not affect the operation. Thus C
0
, A
0
, B
0
can be arbitrarily
assigned to pins 5, 6 and 7 for DIPS. Due to the symmetry of the binary add function, the
HD74AC283/HD74ACT283 can be used either with all inputs and outputs active High (positive logic) or
with all inputs and outputs active Low (negative logic). See Figure a. Note that if C
0
is not used it must be
tied Low for active High logic or tied High for active Low logic.
Due to pin limitations, the intermediate carries of the HD74AC283/HD74ACT283 are not brought out for
use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a
carry out from, an intermediate stage. Figure b shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A
3
, B
3
) Low makes S
3
dependent only on, and equal to, the carry from the third adder.
Using somewhat the same principle Figure c shows a way of dividing the HD74AC283/HD74ACT283 into
a 2-bit and a 1-bit adder. The third stage adder (A
2
, B
2
, S
2
) is used merely as a means of getting a carry
(C
10
) signal into the fourth stage (via A
2
and B
2
) and bringing out the carry from the second stage on S
2
.
Note that as long as A
2
and B
2
are the same, whether High or Low, they do not influence S
2
. Similarly,
when A
2
and B
2
are the same the carry into the third stage does not influence the carry out of the third
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PDF描述 |
|---|---|
| HD74ACT283 | 3-Line To 8-Line Decoders/Demultiplexers 16-CDIP -55 to 125 |
| HD74AC32 | Octal Buffers And Drivers With 3-State Outputs 20-LCCC -55 to 125 |
| HD74AC365 | Octal Buffers And Drivers With 3-State Outputs 20-CDIP -55 to 125 |
| HD74ACT365 | 3-Line To 8-Line Decoders/Demultiplexers 16-CFP -55 to 125 |
| HD74AC366 | Hex Inverter Buffer with 3-State Output |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74AC283/HD74CT283 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HD74AC283AFPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-bit Binary Full Adder with Fast Carry |
| HD74AC283AP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-bit Binary Full Adder with Fast Carry |
| HD74AC283ARPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-bit Binary Full Adder with Fast Carry |
| HD74AC283FP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Binary Adder |
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