參數(shù)資料
型號(hào): HEF4059BT,652
廠商: NXP Semiconductors
文件頁(yè)數(shù): 2/6頁(yè)
文件大小: 0K
描述: IC COUNTER PROG DIV-BY-N 24-SOIC
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 30
系列: 4000B
邏輯類型: 除以 N
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 16
復(fù)位: 異步
計(jì)數(shù)速率: 20MHz
觸發(fā)器類型: 正邊沿
電源電壓: 4.5 V ~ 15.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SO
包裝: 管件
產(chǎn)品目錄頁(yè)面: 843 (CN2011-ZH PDF)
其它名稱: 568-3110-5
933645510652
HEF4059BTD
January 1995
2
Philips Semiconductors
Product specication
Programmable divide-by-n counter
HEF4059B
LSI
DESCRIPTION
The HEF4059B is a divide-by-n counter which can be
programmed to divide an input frequency by any number
n from 3 to 15 999. The output signal is a one clock-cycle
wide pulse and occurs at a rate equal to the input
frequency divided by
n. The single output (O) has TTL
drive capability. The down counter is preset by means of
16 jam inputs (J1 to J16); continued on next page.
Fig.1 Functional block diagram.
FAMILY DATA, IDD LIMITS category LSI
See Family Specifications
Fig.2 Pinning diagram.
PINNING
CP
clock input
Ka, Kb, Kc
mode select inputs
J1 to J16
programmable jam inputs (BCD)
EL
latch enable input
O
divide-by-n output
HEF4059BP(N):
24-lead DIL; plastic (SOT101-1)
HEF4059BD(F):
24-lead DIL; ceramic (cerdip) (SOT94)
HEF4059BT(D):
24-lead SO; plastic (SOT137-1)
( ): Package Designator North America
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