參數(shù)資料
型號： HFBR-5105T
英文描述： 1300nm 500 m，F(xiàn)DDI, 100 Mbps ATM, and Fast Ethernet Transceivers in Low Cost 1x9 Package Style(1300nm 500 m，F(xiàn)DDI, 100 Mbps ATM, 快速以太網(wǎng)收發(fā)器（低價格 1x9 封裝類型）)
中文描述： 1300nm 500米，光纖分布式數(shù)據(jù)介面，100 Mbps的ATM和快速以太網(wǎng)收發(fā)器的低成本1x9封裝形式（1300nm 500米，光纖分布式數(shù)據(jù)介面，100 Mbps的自動取款機，快速以太網(wǎng)收發(fā)器（低價格1x9封裝類型））
文件頁數(shù)： 20/24頁
文件大?。?/td> 351K
代理商： HFBR-5105T
20
HFBR-5105/-5105T
Receiver Optical and Electrical Characteristics
(T
A
=
0
°
C to 70
°
C
, V
CC
= 4.75 V to 5.25 V)
Parameter
Symbol
P
IN Min.
(W)
Min.
Typ.
Max.
-29
Unit
dBm avg.
Reference
Note 20a
Figure 11
Note 21a
Figure 11
Note 20a
Input Optical Power
Minimum at Window Edge
Input Optical Power
Minimum at Eye Center
Input Optical Power Maximum
Operating Wavelength
Duty Cycle Distortion
Contributed by the Receiver
Data Dependent Jitter
Contributed by the Receiver
Random Jitter Contributed
by the Receiver
Signal Detect - Asserted
P
IN Min.
(C)
-29.8
dBm avg.
P
IN Max.
λ
DCD
-14
1270
dBm avg.
nm
ns p-p
1380
0.4
0.02
Note 8
DDJ
0.35
1.0
ns p-p
Note 9
RJ
1.0
2.9
ns p-p
Note 10
P
A
P
D
+ 1.5 dB
-31
dBm avg.
Note 22,
23a
Note 24,
25a
Signal Detect - Deasserted
P
D
-45
dBm avg.
Signal Detect - Hysteresis
Signal Detect Assert Time
(off to on)
Signqal Detect Deassert Time
(on to off)
P
A
- P
D
AS_Max
1.5
0
2.4
55
dB
μ
s
100
Note 22,
25a
Note 24,
25a
ANS_MAX
0
110
350
μ
s
Notes:
1. This is the maximum voltage that
can be applied across the Differen-
tial Transmitter Data Inputs to
prevent damage to the input ESD
protection circuit.
2. The outputs are terminated with
50
connected to V
CC
-2 V.
3. The power supply current needed to
operate the transmitter is provided
to differential ECL circuitry. This
circuitry maintains a nearly con-
stant current flow from the power
supply. Constant current operation
helps to prevent unwanted electrical
noise from being generated and
conducted or emitted to neighboring
circuitry.
4. This value is measured with the out-
puts terminated into 50
connected
to V
CC
- 2 V and an Input Optical
Power level of -14 dBm average.
5. The power dissipation value is the
power dissipated in the receiver
itself. Power dissipation is calcu-
lated as the sum of the products of
supply voltage and currents, minus
the sum of the products of the
output voltages and currents.
6. This value are measured with
respect to V
CC
with the output
terminated into 50
connected to
V
CC
- 2 V.
7. The output rise and fall times are
measured between 20% and 80%
levels with the output connected to
V
CC
-2 V through 50
.
8. Duty Cycle Distortion contributed
by the receiver is measured at the
50% threshold using an IDLE Line
State, 125 MBd (62.5 MHz square-
wave), input signal. The input
optical power level is -20 dBm
average. See Application
Information - Transmitter Jitter
Section for further information.
9. Data Dependent Jitter contributed by
the receiver is specified with the
FDDI DDJ test pattern described in
the FDDI PMD Annex A.5. The
input optical power level is -20 dBm
average. See Application Informa-
tion - Transmitter Jitter Section for
further information.
10. Random Jitter contributed by the
receiver is specified with an IDLE
Line State, 125 MBd (62.5 MHz
square-wave), input signal. The
input optical power level is at maxi-
mum “P
IN Min.
(W)”. See Application
Information - Transmitter Jitter
Section for further information.
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