參數(shù)資料
型號: HFBR-5113
英文描述: Low Cost, Industry Standard FDDI MIC Transceivers(Standard 1x13)(低價格,工業(yè)標準 FDDI MIC收發(fā)器(標準1x13))
中文描述: 成本低,行業(yè)標準FDDI的麥克風收發(fā)器(標準1x13)(低價格,工業(yè)標準FDDI的麥克風收發(fā)器(標準1x13))
文件頁數(shù): 15/16頁
文件大?。?/td> 278K
代理商: HFBR-5113
15
Input symbol pattern is the FDDI
test pattern defined in FDDI PMD
Annex A.5 with 4B/5B NRZI
encoded data that contains a duty
cycle base-line wander effect of
50 kHz. This sequence causes a
near worst case condition for inter-
symbol interference.
Receiver data window time-width is
2.13 ns or greater and centered at
mid-symbol. This worst case
window time-width is the minimum
allowed eye-opening presented to
the FDDI PHY PM_Data indication
input (PHY input) per the example
in FDDI PMD Annex E. This
minimum window time-width of
2.13 ns is based upon the worst
case FDDI PMD Active Input
Interface optical conditions for
peak-to-peak DCD (1.0 ns), DDJ
(1.2 ns) and RJ (0.76 ns)
presented to the receiver.
To test a receiver with the worst case
FDDI PMD Active Input jitter condi-
tion requires exacting control over
DCD, DDJ and RJ jitter components
that is difficult to implement with
production test equipment. The
receiver can be equivalently tested to
the worst case FDDI PMD input jitter
conditions and meet the minimum
output data window time-width of
2.13 ns. This is accomplished by
using a nearly ideal input optical
signal (no DCD, insignificant DDJ
and RJ) and measuring for a wider
window time-width of 4.6 ns. This is
possible due to the cumulative effect
of jitter components through their
superposition (DCD and DDJ are
directly additive and RJ components
are rms additive). Specifically, when
a nearly ideal input optical test signal
is used and the maximum receiver
peak-to-peak jitter contributions of
DCD (0.4 ns), DDJ (1.0 ns), and RJ
(2.14 ns) exist, the minimum window
time-width becomes 8.0 ns -0.4 ns -
1.0 ns - 2.14 ns = 4.46 ns, or
conservatively 4.6 ns. This wider
window time-width of 4.6 ns
guarantees the FDDI PMD Annex E
minimum window time-width of
2.13 ns under worst case input jitter
conditions to the Agilent receiver.
Transmitter operating with an IDLE
Line State pattern, 125 MBd
(62.5 MHz square-wave), input
signal to simulate any cross-talk
present between the transmitter
and receiver sections of the
transmitter.
22. All conditions of Note 21 apply
except that the measurement is made
at the center of the symbol with no
window time-width.
23. This value is measured during the
transition from low to high levels of
input optical power.
24. The Signal Detect output shall be
asserted within 100
μ
s after a step
increase of the Input Optical Power.
The step will be from a low Input
Optical Power,
-45 dBm, into the
range between greater than P
A
, and
-14 dBm. The BER of the receiver
output will be 10
-2
or better during
the time, LS_Max (15
μ
s) after Signal
Detect has been asserted. See Figure
12 for more information.
25. This value is measured during the
transition from high to low levels of
input optical power. The maximum
value will occur when the input
optical power is either -45 dBm
average or when the input optical
power yields a BER of 10
-2
or better,
whichever power is higher.
26. Signal detect output shall be deasserted
within 350
μ
s after a step decrease in
the Input Optical Power from a
level which is the lower of: -31 dBm
or P
D
+ 4 dB (P
D
is the power level at
which signal detect was deasserted),
to a power level of -45 dBm or less.
This step decrease will have occurred
in less than 8 ns. The receiver output
will have a BER of 10
-2
or better for a
period of 12
μ
s or until signal detect
is deasserted. The input data stream
is the Quiet Line State. Also, signal
detect will be deasserted within a
maximum of 350
μ
s after the BER of
the receiver output degrades above
10
-2
for an input optical data stream
that decays with a negative ramp
function instead of a step function.
See Figure 12 for more information.
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