參數(shù)資料
型號: HFCT-5402D
英文描述: 2488 Mb/s Single Mode Fiber Transceiver for SONET OC-48/SDH STM-16 and ATM(應用于SONET OC-48/SDH STM-16 和ATM的2488 Mb/s 單模式光收發(fā)器)
中文描述: 2488 Mb / s的掃描隧道顯微鏡的SONET OC-48/SDH單模光纖收發(fā)器- 16和ATM(應用于的SONET OC-48/SDH的STM - 16和自動柜員機的2488 Mb / s的單模式光收發(fā)器)
文件頁數(shù): 6/20頁
文件大?。?/td> 1017K
代理商: HFCT-5402D
6
RECEIVER
RECEPTACLE
TRANSIMPEDANCE
PREAMPLIFIER
POSTAMP
PLL CLOCK
RECOVERY
AND SIGNAL
DETECTOR
IC
DATA OUT
DATA OUT
CLOCK OUT
CLOCK OUT
SD
REF
CLK
Figure 8. Receiver Block Diagram
Figure 9. Reference Clock Rise and Fall Times Versus Amplitude
Receiver Section
Reference Clock
The clock and data regeneration
function is designed such that a
reference clock running at 1/128th
the data rate is required to acquire
and maintain lock. Operation at
other clock frequencies in the
vicinity of 2.488 GHz are possible
by using different crystal
oscillators having 1/128th the
frequency of interest. (for
2488 Mb/s operation a 19.44 MHz
clock is required). Figure 8
illustrates the receiver operation.
Inputs fed to the reference clock
(pin 1) require 100 nF ac coupling
and need 100 ppm frequency
accuracy. Clock outputs are
maintained at 2.48832 GHz
throughout the dynamic range of
the receiver up to the threshold of
Signal Detect. In the absence of
input optical data, the transceiver
clock will vary within 1000 ppm of
the clock frequency.
All development and
characterization work have been
performed with a PECL 19.44 MHz
clock oscillator part number
OSO-SFE-B00C obtained from
Onspec (www.onspec.co.uk).
Figure 9 shows the rise time and
amplitude requirements for the
reference clock input. Various
combinations of rise times and
amplitudes allow the user a
degree of freedom in selecting
clock sources.
2
3
4
5
6
7
8
0
100
200
300
400
500
600
700
800
900
Reference Clock Amplitude (mVpp)
r
Acceptable time/amplitude
combinations
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