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參數(shù)資料
| 型號： | HI1866JCQ |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 6-Bit, 140 MSPS, Flash A/D Converter |
| 中文描述： | 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 97K |
| 代理商： | HI1866JCQ |
4-12
Notes on Operation
The HI1186 is a high speed A/D converter with ECL level
logic input and demultiplexed TT level output. Take notice of
the following to ensure optimum performance from this IC.
Power Supply and Grounding
Grounding has a profound influence on converter
performance. The higher the frequency is, the more impor-
tant the way of grounding becomes.
The ground pattern should be as large as possible. It is
recommended to make the power supply and ground
patterns wider at an inner layer using the multi-layer board.
To prevent interference between the AGND and DGND pat-
terns and between the AV
EE
and DV
EE
lines, make sure the
respective patterns are separated. To prevent a DC offset in
the power supply pattern, connect the AV
EE
and DV
EE
lines
at one point each via a ferrite-bead filter. Shorting analog
and digital ground patterns in one place immediately under
the A/D converter improves A/D converter performance.
Ground the power supply pins (AV
EE
, DV
EE
, DV
CC
) as
close to each pin as possible with a 0.1
μ
F or larger ceramic
chip capacitor. (Connect the AV
EE
pin to the AGND pattern,
DV
EE
to DGND, and DV
CC
to DGND.)
Analog Input
Make the connection between the V
IN
pin and the analog
input source as short as possible.
There is a slight offset voltage at reference voltage pins V
RT
and V
RB
. If it presents no problem in the application, the
voltage can be applied directly. However, if the reference
voltage is to be set precisely, apply it via a feedback circuit
created, using the V
RTS
and V
RBS
pins.
Make adequate bypass for high frequency noise at V
RT
and
V
RB
. The V
RT
pin is normally connected to AGND on the
board. Bypass the V
RB
pin to the AGND pattern with a 0.1
μ
F
or larger ceramic chip capacitor as short as possible. The
10
μ
F tantalum capacitor connected to V
RB
in the Application
Circuit is to stop oscillation in the reference voltage
generation circuit.
Digital Input
Noise at the INV pin may cause misoperation of which the
cause is extremely hard to identify. If it is okay for the set
voltage level to be low only, leave the pin open. If a high level
voltage has to be input, bypass the INV pin to DGND with an
about 0.1
μ
F ceramic chip capacitor as short as possible. It is
recommended that high level input voltage is about -0.5V to -
1.0V, and low level input voltage is about -1.6V to -2.5V.
When inputting a high level voltage, avoid connecting directly
to DGND.
The HI1186 has input pins for two clocks: CCLK and DCLK.
For CCLK, which is used for the internal comparator, input
an ECL level clock with up to the maximum conversion fre-
quency. For DCLK, which is used for the multiplex output,
input an ECL level clock with a rate half that of CCLK. Take
notice of the timing between CCLK and DCLK.
It is recommended that differential signals be input to the
clock input pins CCLK, NCCLK, DCLK and NDCLK. The A/D
converter can be driven only by the clock input pins CCLK
and DCLK, but there is a risk of unstable characteristics at
maximum speeds.
If the NCCLK and NDCLK pins are not used, bypass these
pins to DGND with an about 0.1
μ
F capacitor. In this time,
about -1.3V voltage is generated at the NCCLK and NDCLK
pins. However, this is too weak to be used as threshold volt-
age V
BB
; it can not directly drive even one ECL input load.
The clock duty cycle is designed for use at 50%. Any
diversion from this percentage will have a slight effect on the
maximum performance of the A/D converter, but there is no
great need for adjustment.
Digital Output
P1D0 (LSB) to P1D5 (MSB), and P2D0 (LSB) to P2D5
(MSB) are demultiplex digital outputs (2 systems), and are
output using the DCLK timing. The polarity of the output data
can be inverted using the INV signal.
HI1866
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI1866 | 6-Bit, 140 MSPS, Flash A/D Converter |
| HI2301 | 8-Bit, 30 MSPS, Video A/D Converter with Amplifier/Clamp |
| HI2301JCQ | 8-Bit, 30 MSPS, Video A/D Converter with Amplifier/Clamp |
| HI2302 | 8-Bit, 50 MSPS, Video A/D Converter with Clamp Function |
| HI2302JCQ | 8-Bit, 50 MSPS, Video A/D Converter with Clamp Function |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-190M | 制造商:HANNA INSTRUMENTS 功能描述:STIRRER MAGNETIC |
| HI1CB2G | 制造商:Hubbell Wiring Device-Kellems 功能描述:HOUSING, HI,SURFACE,NEMA 4/12,1P,GY |
| HI1CBSS | 制造商:Hubbell Wiring Device-Kellems 功能描述:HOUSING, HI,SURFACE,1P,SS,4X |
| HI1-DAC16B-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital-to-Analog Converter |
| HI1-DAC16C-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital-to-Analog Converter |
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