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參數(shù)資料
| 型號(hào)： | HI1866JCQ |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 6-Bit, 140 MSPS, Flash A/D Converter |
| 中文描述： | 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 97K |
| 代理商： | HI1866JCQ |
4-5
Absolute Maximum Ratings
Thermal Information
Supply Voltage (AV
EE
, DV
EE
) . . . . . . . . . . . . . . . . . . . . -7V to 0.5V
(DV
CC
) (Note 2). . . . . . . . . . . . . . . . . . . .0.5V to 7.0V
Reference Voltage (V
RT
, V
RB
). . . . . . . . . . . . . . . . . . . -2.7V to 0.5V
(
V
RT
- V
RB
). . . . . . . . . . . . . . . . . . . . . . . . .2.5V
Analog Input Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . -2.7V to 0.5V
Digital Input Voltage (DIN) (Note 3) . . . . . . . . . . . . . . . -4.0V to 0.5V
(
CCLK–NCCLK
,
DCLK–NDCLK
) . . . .2.5V
Digital Output Current (I
D0
to I
D6
) . . . . . . . . . . . . . -30mA to +30mA
Storage Temperature (T
STG
) . . . . . . . . . . . . . . . . . . -65
o
C to 150
o
C
Ambient Operating Temperature (T
A
). . . . . . . . . . . . . -20
o
C to 75
o
C
Allowable Power Dissipation (P
D
). . . . . . . . . . . . . . . . . . . . . 750mW
Recommended Operating Conditions
Thermal Resistance (Typical, Note 1)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range (T
STG
) . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(Lead Tips Only)
θ
JA
(
o
C/W)
95
Supply Voltage
AV
EE
, DV
EE
. . . . . . . . . . . . . . . . . . . . . . . -5.5V
AV
EE
- DV
EE
. . . . . . . . . . . . . . . . . . . . . . .-0.05V
AGND - DGND (Note 4) . . . . . . . . . . . . . -0.05V
DV
CC
(Note 5). . . . . . . . . . . . . . . . . . . . . . 4.75V
Temperature Range (T
A
) . . . . . . . . . . . . . . . -20
o
C
MIN
TYP
-5.2V
0V
0V
5.0V
-
MAX
-4.75V
0.05V
0.05V
5.25V
75
o
C
Reference Input Voltage
V
RT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.1V
V
RB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.2V
Analog Input Voltage (V
IN
) . . . . . . . . . . . . .
Digital Input Voltage, DIN (H) . . . . . . . . . . . -1.1V
DIN (L)
CCLK, NCCLK Frequency (f
CCLK
)(MHz) . .
DCLK, NDCLK Frequency (f
DCLK
)(MHz) . .
CCLK, NCCLK Duty (D
CCLK
)(%) . . . . . . . .
DCLK, NDCLK Duty (D
DCLK
)(%) . . . . . . . .
CCLK-DCLK Time Difference (t
DCD
)(ns). . . . -t
PWL
+ 2 0
MIN
TYP
0V
-2.0V
To
-
-
-
-
50
50
MAX
0.1V
-0.8V
V
RT
-
-1.5V
140
70
60
60
V
RB
-
-
-
40
40
t
PWH
+ 1
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
2. DV
CC
= DV
CC1
, DV
CC2
.
3. D
IN
= CCLK, NCCLK, DCLK, NDCLK, INV.
4. DGND = DGND1, DGND2, DGND3.
5. Refer to Timing Chart 1 for t
PWL
, t
PWH
.
Electrical Specifications
T
A
= 25
o
C, AV
EE
= DV
EE
= -5.2V, DV
CC
= 5V, V
RT
= 0V, V
RB
= -2V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Resolution, n
n
-
6
-
bits
DC CHARACTERISTICS
Integral Linearity Error
E
IL
f
C
= 140MHz
-
-
±
0.2
LSB
Differential Linearity Error
E
DL
f
C
= 140MHz
-
-
±
0.2
LSB
No Missing Code
-
Guar-
anteed
-
-
ANALOG INPUT
Analog Input Capacitance
C
IN
V
IN
= -1V_0.7V
RMS
, DC
-2V
≤
V
IN
≤
0V
-2V
≤
V
IN
≤
0V
-
7
-
pF
Analog Input Resistance
R
IN
200
-
-
K
Input Bias Current
I
IN
-
-
110
μΑ
REFERENCE INPUT
Reference Resistance
R
REF
-
225
-
Reference Resistance Current
I
REF
-
9
-
mA
Offset Voltage
V
RT
E
OT
0
-
25
mV
V
RB
E
OB
-
-
25
mV
DIGITAL INPUT
Logic High Level
V
IH
-1.13
-
-
V
HI1866
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