- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371813 > HI3-7152B-9 (INTERSIL CORP) 10-Bit High Speed A/D Converter with Track and Hold PDF資料下載
參數(shù)資料
| 型號： | HI3-7152B-9 |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | 10-Bit High Speed A/D Converter with Track and Hold |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 829K |
| 代理商： | HI3-7152B-9 |
6-6
AC Electrical Specifications
V+ = 5V
±
10%, V- = -5V
±
10%, V
REF
= 2.5V, T
A
= 25
o
C, f
CLK
= 600kHz, 50% Duty Cycle,
C
L
= 100pF (including stray for D0 - D9, OVR, HOLD, BUSY), Unless Otherwise Specified (Note 12)
PARAMETER
SYMBOL
NOTES
25
o
C
0
o
C to 75
o
C
-40
o
C to 85
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Continuous Conversion Time
t
SPS
10
-
-
3tck
-
3tck
-
3tck
μ
s
10
60
-
5
60
5
60
10
μ
s
Slow Memory Mode Conversion
Time
t
CONV
6, 9
-
-
4tck
+0.9
-
4tck
+0.9
-
4tck
+0.9
μ
s
Continuous Throughput
t
CYC
10
-
-
f
CLK
/3
-
f
CLK
/3
-
f
CLK
/3
sps
CLOCK Period
t
CK
-
-
1/f
CLK
-
-
-
-
-
Clock Input Duty Cycle
D
6
45
50
55
45
55
45
55
%
CLOCK to HOLD Rise Delay
t
CKHR
6
150
290
500
140
525
120
525
ns
WR Pulse Width
t
WRL
6, 9, 11
200
113
tck/2
225
tck/2
225
tck/2
ns
WR to HOLD Delay
t
HOLD
6, 9
-
80
170
-
200
-
200
ns
Busy to Data
t
BD
6, 9
-
40
200
-
230
-
230
ns
WR to RD Active
t
WRD
6, 9
100
-
-
100
-
100
-
ns
CLOCK to HOLD Fall Delay
t
CKHF
6, 10
50
125
250
40
275
25
275
ns
HOLD to DATA Change
t
DATA
6, 10
100
200
400
90
550
70
550
ns
RD LO to Active
t
RD
6, 14
-
75
150
-
190
-
190
ns
RD HI to Inactive
t
RX
6, 15
-
25
60
-
80
-
80
ns
HBE to DATA
t
AD
6
-
70
150
-
165
-
165
ns
CS to DATA
t
CD
6
-
95
180
-
210
-
210
ns
RD to BUSY
t
BUSY
6
-
35
200
-
200
-
200
ns
Rise Time
t
r
6, 13
-
50
100
-
125
-
125
ns
Fall Time
t
f
6, 13
-
45
100
-
120
-
120
ns
NOTES:
9. Slow memory mode timing.
10. Fast memory or DMA mode of operation, except the first conversion which is equal to t
CONV
.
11. Maximum specification to prevent multiple triggering with WR.
12. All input drive signals are specified with t
r
= t
f
≤
20ns and shall swing from V
IL
-0.4V to V
IH
+0.4V for all timing specifications. A signal is
considered to change state as it crosses a 1.4V threshold (except t
RD
and t
RX
).
13. t
r
and t
f
load is C
L
= 100pF (including stray capacitance) to DG and is measured from the 10 - 90% point.
14. t
RD
is the time required for the data output level to change by 10% in response to RD crossing a voltage level of 1.4V. High-Z to V
OH
is
measured with R
L
= 2.5k
and C
L
= 100pF (including stray) to DG. High-Z to V
OL
is measured with R
L
= 2.5k
to V+ and C
L
= 100pF
(including stray) to DG.
15. t
RX
is the time required for the data output level to change by 10% in response to RD crossing a voltage level of 1.4V. V
OH
to High-Z is
measured with R
L
= 2.5k
and C
L
= 10pF (including stray) to DG. V
OL
to High-Z is measured with R
L
= 2.5k
to V+ and C
L
= 10pF
(including stray) to DG.
HI-7152
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI3-7152J-5 | 10-Bit High Speed A/D Converter with Track and Hold |
| HI3-7152K-5 | 10-Bit High Speed A/D Converter with Track and Hold |
| HI3-7153J-5 | 8-Channel, 10-Bit High Speed Sampling A/D Converter |
| HI-7153 | 128 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI3-7153A-9 | 8-Channel, 10-Bit High Speed Sampling A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI3-7152J-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HI3-7152K-5 | 制造商:Harris Corporation 功能描述: |
| HI3-7153A-9 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:8-Channel, 10-Bit High Speed Sampling A/D Converter |
| HI3-7153J-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HI3-7159A-5 | 功能描述:CONV A/D 5.5 DIGITIC MPU 28-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
發(fā)布緊急采購，3分鐘左右您將得到回復。