參數(shù)資料
型號(hào)： HI-7153
廠商： Intersil Corporation
英文描述： 128 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN
中文描述： 8通道，10位高速采樣A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 1/17頁(yè)
文件大?。?/td> 977K
代理商： HI-7153
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
1
HI-7153
8-Channel, 10-Bit High Speed
Sampling A/D Converter
Description
The HI-7153 is an 8 channel high speed 10 bit A/D converter
which uses a Two Step Flash algorithm to achieve through-put
rates of 200kHz. The converter features an 8 channel CMOS
analog multiplexer with random channel addressing. A unique
switched capacitor technique allows a new input voltage to be
sampled while a conversion is taking place.
Internal high speed CMOS buffers at both the analog and refer-
ence inputs simplifies interface requirements.
A Track and Hold amplifier is included on the chip, consisting of
two high speed amplifiers and an internal hold capacitor,
reducing external circuitry.
Microprocessor bus interfacing is simplified by the use of stan-
dard Chip Select, Read, and Write control signals. The digital
three-state outputs are byte organized for bus interface to 8 or
16 bit systems. An Out-of-Range pin, together with the MSB bit,
can be used to indicate an under or over-range condition.
The HI-7153 operates with
±
5V supplies. Only a single +2.5V refer-
ence is required to provide a bipolar input range from -2.5V to
+2.5V.
Ordering Information
PART
NUMBER
LINEARITY
(MAX ILE)
TEMPERA-
TURE RANGE
PACKAGE
HI3-7153J-5
±
1.0 LSB
0
o
C to +70
o
C
40 Lead Plastic DIP
HI3-7153A-9
±
1.0 LSB
-40
o
C to +85
o
C
40 Lead Plastic DIP
HI1-7153S-2
±
1.0 LSB
-55
o
C to +125
o
C 40 Lead Ceramic DIP
Features
5
μ
s Conversion Time
8 Channel Input Multiplexer
200,000 Channels/Second Throughput Rate
Over 9 Effective Bits at 20kHz
No Offset or Gain Adjustments Necessary
Analog and Reference Inputs Fully Buffered
On-Chip Track and Hold Amplifier
μ
P Compatible Interface
2’s Complement Data Output
150mW Power Consumption
Only a Single 2.5V Reference Required for a
±
2.5V
Input Range
Out-of-Range Flag
/883 Version Available
Applications
μ
P Controlled Data Acquisition Systems
DSP
- Avionics
- Sonar
Process Control
- Automotive Transducer Sensing
- Industrial
Robotics
Digital Communications
December 1997
Functional Diagram
TWO
STEP
FLASH
INPUT
BUFFER
AMP
33
LATCHES
AND
OUTPUT
BUFFERS
BUS
CTRL
POWER
SUPPLY
DISTRIBUTION
HBE
BUS
OVR
D9
DO
DATA OUTPUTS
AG
(ANALOG GND)
R
1
DG
(DIGITAL GND)
GND
V+
-
+
HOLD
RD
WR
CS
SMODE
CLK
EOC
REF
AMP
REF
INVERT
MUX
CONTROL
LOGIC
ALE
TEST
A
IN0
A
IN1
A
IN2
A
IN3
A
IN4
A
IN5
A
IN6
A
IN7
A0
A1
A2
V-
TRACK
HOLD
AMP
V
REF
File Number
2787.4
NOT RECOMMENDED FOR NEW DESIGNS
See HI5810
or contact our Technicl Support Center at
1-888-INTERSIL or www.intersil.com/tsc
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