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參數(shù)資料
| 型號(hào)： | HI3026EVAL |
| 廠(chǎng)商： | Intersil Corporation |
| 英文描述： | 8-Bit, 120 MSPS, Flash A/D Converter |
| 中文描述： | 8位，120 MSPS的，閃光的A / D轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 10/17頁(yè) |
| 文件大?。?/td> | 207K |
| 代理商： | HI3026EVAL |
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Operating Modes
The HI3026 has two types of operating modes which are selected with Pin 45 (SELECT).
DMUX Mode (See Application Circuits, Figures 18, 19, 20)
Set the SELECT pin to V
CC
for this mode. In this mode, the
clock frequency is divided by 2 in the IC, and the data is out-
put after being demultiplexed by this
1
/
2
frequency divided
clock. The
1
/
2
frequency divided clock, which has adequate
setup time and hold time for the output data, is output from
the CLKOUT pin.
When using multiple HI3026 units in parallel in this mode, dif-
ferences in the start timing of the
1
/
2
frequency divided clock
may cause operation as shown in the figure below. As a coun-
termeasure, the HI3026 is equipped with a function which
resets the
1
/
2
frequency divided clock. When resetting this
clock, the RESET pulse must be input to the RESET pin. See
the Timing Charts for the RESET pulse input timing. The A/D
converter can operate at f
C
(Min) = 120 MSPS in this mode.
Straight Mode (See Application Circuits, Figures 21, 22, 23)
Set the SELECT pin to GND for this mode. In this mode, data
output can be obtained in accordance with the clock frequency
applied to the A/D converter for applications which use the
clock applied to the A/D converter as the system clock.
FIGURE 6. ERROR RATE MEASUREMENT CIRCUIT
FIGURE 7. SAMPLING DELAY/APERTURE JITTER
MEASUREMENT CIRCUIT
NOTE: Where
σ
(LSB) is the deviation of the output codes when the
largest slew rate point is sampled at the clock which has exactly the
same frequency as the analog input signal, the aperture jitter t
AJ
is:
t
AJ
=
σ
/
t
FIGURE 8. APERTURE JITTER MEASUREMENT METHOD
Test Circuits
(Continued)
SIGNAL
SOURCE
COMPARATOR
A > B
PULSE
COUNTER
SIGNAL
SOURCE
HI3026
LATCH
+
1
/
8
LATCH
A
f
C
4
B
8
16 LSB
2V
P-P
SINE WAVE
-1kHz
V
IN
CLK
CLK
f
C
LOGIC
ALALYZER
HI3026
V
IN
CLK
AMP
8
1024
SAMPLES
ECL
BUFFER
OSC1
φ
: VARIABLE
OSC2
100MHz
f
R
100MHz
V
RT
V
RM2
V
RB
129
128
127
126
125
(LSB)
υ
t
σ
V
IN
CLK
V
IN
CLK
SAMPLING TIMING FLUCTUATION
(= APERTURE JITTER)
------
=
σ
/22
x 2
π
f
.
TABLE 2. OPERATING MODE TABLE
OPERATING
MODE
SELECT
MAXIMUM
CONVERSION RATE
DATA OUTPUT
CLOCK OUTPUT
The input clock is
1
/
2
frequency
divided and output at 60MHz.
DMUX Mode
V
CC
120 MSPS
Demultiplexed Output
60 MBPS
Straight Mode
GND
100 MSPS
Straight Output 100 MBPS
The input clock is inverted and
output at 100MHz.
HI3026
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PDF描述 |
|---|---|
| HI3026 | 8-Bit, 120 MSPS, Flash A/D Converter(8位、采樣速率為120MSPS的A/D轉(zhuǎn)換器) |
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|---|---|
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| HI-303/883 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Dual SPDT CMOS Analog Switch |
| HI303005 | 制造商:Harris Corporation 功能描述: |
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